1.2-μM non-epi CMOS smart power IC with four H-bridge motor drivers for portable applications

Boeun Kim; Cheolwoo Kim; Sangchan Han; Soowon Kim; Hoonsoo Park; Hunsub Park

1.2-μM non-epi CMOS smart power IC with four H-bridge motor drivers for portable applications

Boeun Kim, Cheolwoo Kim, Sangchan Han, Soowon Kim, Hoonsoo Park, Hunsub Park

Research output: Contribution to journal › Conference article › peer-review

Abstract

A smart power IC is designed with lateral DMOSFETs and fabricated in 1.2-μm non-epi CMOS process. Since digitally controlled PWM scheme is utilized with a high-speed clock frequency, the designed smart IC is suitable for high-speed CD-ROM applications which require fast tracking and high-precision motor control. The smart power IC also combines a step-down DC-to-DC converter and a linear regulator which has a zero fold-back current capability. A self-isolated lateral DMOSFET cell with minimum process change is realized with a pitch size of 16 μm which results to an extremely low specific on-resistance of 0.39 mΩ-cm². The active die area occupies 19.1 mm².

Original language	English
Pages (from-to)	633-636
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	1
Publication status	Published - 1996
Event	Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA Duration: 1996 May 12 → 1996 May 15

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

@article{328275d132fa4901838149324b53c090,

title = "1.2-μM non-epi CMOS smart power IC with four H-bridge motor drivers for portable applications",

abstract = "A smart power IC is designed with lateral DMOSFETs and fabricated in 1.2-μm non-epi CMOS process. Since digitally controlled PWM scheme is utilized with a high-speed clock frequency, the designed smart IC is suitable for high-speed CD-ROM applications which require fast tracking and high-precision motor control. The smart power IC also combines a step-down DC-to-DC converter and a linear regulator which has a zero fold-back current capability. A self-isolated lateral DMOSFET cell with minimum process change is realized with a pitch size of 16 μm which results to an extremely low specific on-resistance of 0.39 mΩ-cm2. The active die area occupies 19.1 mm2.",

author = "Boeun Kim and Cheolwoo Kim and Sangchan Han and Soowon Kim and Hoonsoo Park and Hunsub Park",

year = "1996",

language = "English",

volume = "1",

pages = "633--636",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) ; Conference date: 12-05-1996 Through 15-05-1996",

}

TY - JOUR

T1 - 1.2-μM non-epi CMOS smart power IC with four H-bridge motor drivers for portable applications

AU - Kim, Boeun

AU - Kim, Cheolwoo

AU - Han, Sangchan

AU - Kim, Soowon

AU - Park, Hoonsoo

AU - Park, Hunsub

PY - 1996

Y1 - 1996

N2 - A smart power IC is designed with lateral DMOSFETs and fabricated in 1.2-μm non-epi CMOS process. Since digitally controlled PWM scheme is utilized with a high-speed clock frequency, the designed smart IC is suitable for high-speed CD-ROM applications which require fast tracking and high-precision motor control. The smart power IC also combines a step-down DC-to-DC converter and a linear regulator which has a zero fold-back current capability. A self-isolated lateral DMOSFET cell with minimum process change is realized with a pitch size of 16 μm which results to an extremely low specific on-resistance of 0.39 mΩ-cm2. The active die area occupies 19.1 mm2.

AB - A smart power IC is designed with lateral DMOSFETs and fabricated in 1.2-μm non-epi CMOS process. Since digitally controlled PWM scheme is utilized with a high-speed clock frequency, the designed smart IC is suitable for high-speed CD-ROM applications which require fast tracking and high-precision motor control. The smart power IC also combines a step-down DC-to-DC converter and a linear regulator which has a zero fold-back current capability. A self-isolated lateral DMOSFET cell with minimum process change is realized with a pitch size of 16 μm which results to an extremely low specific on-resistance of 0.39 mΩ-cm2. The active die area occupies 19.1 mm2.

UR - http://www.scopus.com/inward/record.url?scp=0029724073&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0029724073

SN - 0271-4310

VL - 1

SP - 633

EP - 636

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4)

Y2 - 12 May 1996 through 15 May 1996

ER -

1.2-μM non-epi CMOS smart power IC with four H-bridge motor drivers for portable applications

Abstract

ASJC Scopus subject areas

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