12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interfaces

Keyphrases

• Signaling Schemes 100%
• Transition Scheme 100%
• Data Payload 100%
• Balanced Line 100%
• 8K UHD 100%
• Intra-panel Interface 100%
• Data Encoding 66%
• High Efficiency 33%
• Coding Scheme 33%
• Data Dependency 33%
• On-glass 33%
• Serial Link 33%
• Signaling Channel 33%
• Signal Integrity 33%
• Reference Clock 33%
• Clock Signal 33%
• Signal Level 33%
• Different Voltage 33%
• Physical Limitations 33%
• Random Data 33%
• Source Driver 33%
• Effective Bandwidth 33%
• Clock Recovery 33%
• Redundant Bits 33%
• Low EMI 33%
• Embedded Clock 33%
• Transition Density 33%
• Embedding Scheme 33%
• Multilevel Signaling 33%
• Multi-drop 33%
• Voltage Margin 33%
• Voltage Domain 33%
• Forwarded Clock 33%
• 8b10b 33%

Engineering

• Limitations 100%
• Resistive 100%
• Encoding Scheme 100%
• Signal Channel 100%
• Reference Clock 100%
• Clock Signal 100%
• Signal Level 100%
• Redundant Bit 100%
• Clock Recovery 100%
• Effective Bandwidth 100%
• Data Stream 100%

Computer Science

• Panel Interface 100%
• Data Stream 33%
• Channel Signal 33%
• Signal Integrity 33%
• Reference Clock 33%
• Encoding Scheme 33%
• Effective Bandwidth 33%
• Point Interface 33%