6.4: A Clock-embedded Voltage Differential Signaling (CVDS) for the chip-on-glass application of TFT-LCD

Hyun Kyu Jeon, Yong Hwan Moon, Jeong Il Seo, Ju Pyo Hong, Kwang Il Oh, Jun H. Kim, Jung Hwan Choi, Seok Jae Park, Joon Ho Na, Jae Ryun Shim, Heong Seog Oh, Dae Seong Kim, Dae Keun Han, Jeong Ho Kang, Koo Won Kang, Kyoung Tae Moon, Jin Kyu Kim, Hyun Chul Choi, Lee Sup Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An intra-panel interface for the Chip-On-Glass (COG) application is developed using a Clock-embedded Voltage Differential Signaling (CVDS). The proposed interface adopts an embedded clock scheme to eliminate the skew between data and clock signals. The transmitter and receiver for the proposed interface are equipped with the transition compensator and equalizer to overcome the frequency limitation caused by highly resistive Line-On-Glass (LOG) of the COG application. The maximum data rate per pair is measured as high as 780Mbps at the prototype with the refresh rate up to 105Hz. The proposed interface achieves low electromagnetic interference (EMI) and low power consumption. The power consumption of the proposed interface is reduced by 50% compared to the conventional interfaces for the COG application.

Original languageEnglish
Title of host publication48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
Pages66-69
Number of pages4
Publication statusPublished - 2010
Externally publishedYes
Event48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010 - Seattle, WA, United States
Duration: 2010 May 232010 May 28

Publication series

Name48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
Volume1

Other

Other48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
Country/TerritoryUnited States
CitySeattle, WA
Period10/5/2310/5/28

ASJC Scopus subject areas

  • Hardware and Architecture
  • Information Systems

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