A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers

Hyung Min Lee; Young Suk Son; Yong Joon Jeon; Jin Yong Jeon; Geon Ho Lee; Seung Chul Jung; Gyu Hyeong Cho

doi:10.1889/1.2785302

A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers

Hyung Min Lee, Young Suk Son, Yong Joon Jeon, Jin Yong Jeon, Geon Ho Lee, Seung Chul Jung, Gyu Hyeong Cho

Research output: Contribution to journal › Conference article › peer-review

8 Citations (Scopus)

Abstract

A 10 bit digital-to-analog converter (DAC) with an interpolating buffer amplifier is proposed for AMLCD column drivers. The proposed circuit is more effective than a conventional circuit in decreasing the DAC (Pass-Transistor Logic) area per channel. The average static current per channel is 1.8 μA and the average interpolating error rate in most of the gray range is a sufficiently small rate of 2.5 % (and less than 0.5 % in the mid-gray range). The uniformity of the channel output is also guaranteed by the proposed error-reduction technique.

Original language	English
Pages (from-to)	346-349
Number of pages	4
Journal	Digest of Technical Papers - SID International Symposium
Volume	38
Issue number	1
DOIs	https://doi.org/10.1889/1.2785302
Publication status	Published - 2007
Externally published	Yes
Event	2007 SID International Symposium - Long Beach, CA, United States Duration: 2007 May 23 → 2007 May 25

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1889/1.2785302

Cite this

@article{fa27f196a40848f8a6c7950c8eebfcab,

title = "A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers",

abstract = "A 10 bit digital-to-analog converter (DAC) with an interpolating buffer amplifier is proposed for AMLCD column drivers. The proposed circuit is more effective than a conventional circuit in decreasing the DAC (Pass-Transistor Logic) area per channel. The average static current per channel is 1.8 μA and the average interpolating error rate in most of the gray range is a sufficiently small rate of 2.5 % (and less than 0.5 % in the mid-gray range). The uniformity of the channel output is also guaranteed by the proposed error-reduction technique.",

author = "Lee, {Hyung Min} and Son, {Young Suk} and Jeon, {Yong Joon} and Jeon, {Jin Yong} and Lee, {Geon Ho} and Jung, {Seung Chul} and Cho, {Gyu Hyeong}",

year = "2007",

doi = "10.1889/1.2785302",

language = "English",

volume = "38",

pages = "346--349",

journal = "Digest of Technical Papers - SID International Symposium",

issn = "0097-966X",

number = "1",

note = "2007 SID International Symposium ; Conference date: 23-05-2007 Through 25-05-2007",

}

TY - JOUR

T1 - A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers

AU - Lee, Hyung Min

AU - Son, Young Suk

AU - Jeon, Yong Joon

AU - Jeon, Jin Yong

AU - Lee, Geon Ho

AU - Jung, Seung Chul

AU - Cho, Gyu Hyeong

PY - 2007

Y1 - 2007

N2 - A 10 bit digital-to-analog converter (DAC) with an interpolating buffer amplifier is proposed for AMLCD column drivers. The proposed circuit is more effective than a conventional circuit in decreasing the DAC (Pass-Transistor Logic) area per channel. The average static current per channel is 1.8 μA and the average interpolating error rate in most of the gray range is a sufficiently small rate of 2.5 % (and less than 0.5 % in the mid-gray range). The uniformity of the channel output is also guaranteed by the proposed error-reduction technique.

AB - A 10 bit digital-to-analog converter (DAC) with an interpolating buffer amplifier is proposed for AMLCD column drivers. The proposed circuit is more effective than a conventional circuit in decreasing the DAC (Pass-Transistor Logic) area per channel. The average static current per channel is 1.8 μA and the average interpolating error rate in most of the gray range is a sufficiently small rate of 2.5 % (and less than 0.5 % in the mid-gray range). The uniformity of the channel output is also guaranteed by the proposed error-reduction technique.

UR - http://www.scopus.com/inward/record.url?scp=34547897737&partnerID=8YFLogxK

U2 - 10.1889/1.2785302

DO - 10.1889/1.2785302

M3 - Conference article

AN - SCOPUS:34547897737

SN - 0097-966X

VL - 38

SP - 346

EP - 349

JO - Digest of Technical Papers - SID International Symposium

JF - Digest of Technical Papers - SID International Symposium

IS - 1

T2 - 2007 SID International Symposium

Y2 - 23 May 2007 through 25 May 2007

ER -

A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers

Abstract

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this