A 101.6-dB-SNDR Fully Dynamic Zoom ADC Using Miller-Compensated Floating Inverter Amplifiers

Yohan Choi; Woojin Lee; Sooho Park; Changjoo Kim; Hyundo Jung; Chulwoo Kim

doi:10.1109/TCSII.2024.3392909

A 101.6-dB-SNDR Fully Dynamic Zoom ADC Using Miller-Compensated Floating Inverter Amplifiers

Yohan Choi, Woojin Lee, Sooho Park, Changjoo Kim, Hyundo Jung, Chulwoo Kim

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

This brief presents a fully dynamic zoom analog-to-digital converter (ADC) using a Miller-compensated two-stage floating inverter amplifier (MCFIA). Due to the two-stage design, the proposed MCFIA achieves a sufficient gain for a high-resolution delta-sigma modulator design. Compared to the conventional two-stage design, the stability criterion of MCFIA is advantageous in driving bigger sampling capacitors needed to reduce $kT/C$ noise. Moreover, a zoom ADC architecture mitigates the swing range requirement of the MCFIA. A prototype ADC was implemented in a 180-nm CMOS process and achieved a signal-to-noise and distortion ratio (SNDR) of 101.6 dB with an SNDR-based Schreier figure-of-merit of 174.8 dB at a sampling frequency of 2.56 MHz.

Original language	English
Pages (from-to)	4141-4145
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	71
Issue number	9
DOIs	https://doi.org/10.1109/TCSII.2024.3392909
Publication status	Published - 2024

Bibliographical note

Publisher Copyright:
© 2024 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.

Keywords

Analog-to-digital converter (ADC)
Miller compensation
dynamic amplifier
floating inverter amplifier
fully dynamic ADC
zoom ADC

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/TCSII.2024.3392909

Cite this

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title = "A 101.6-dB-SNDR Fully Dynamic Zoom ADC Using Miller-Compensated Floating Inverter Amplifiers",

abstract = "This brief presents a fully dynamic zoom analog-to-digital converter (ADC) using a Miller-compensated two-stage floating inverter amplifier (MCFIA). Due to the two-stage design, the proposed MCFIA achieves a sufficient gain for a high-resolution delta-sigma modulator design. Compared to the conventional two-stage design, the stability criterion of MCFIA is advantageous in driving bigger sampling capacitors needed to reduce $kT/C$ noise. Moreover, a zoom ADC architecture mitigates the swing range requirement of the MCFIA. A prototype ADC was implemented in a 180-nm CMOS process and achieved a signal-to-noise and distortion ratio (SNDR) of 101.6 dB with an SNDR-based Schreier figure-of-merit of 174.8 dB at a sampling frequency of 2.56 MHz.",

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author = "Yohan Choi and Woojin Lee and Sooho Park and Changjoo Kim and Hyundo Jung and Chulwoo Kim",

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AU - Lee, Woojin

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AU - Kim, Changjoo

AU - Jung, Hyundo

AU - Kim, Chulwoo

PY - 2024

Y1 - 2024

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AB - This brief presents a fully dynamic zoom analog-to-digital converter (ADC) using a Miller-compensated two-stage floating inverter amplifier (MCFIA). Due to the two-stage design, the proposed MCFIA achieves a sufficient gain for a high-resolution delta-sigma modulator design. Compared to the conventional two-stage design, the stability criterion of MCFIA is advantageous in driving bigger sampling capacitors needed to reduce $kT/C$ noise. Moreover, a zoom ADC architecture mitigates the swing range requirement of the MCFIA. A prototype ADC was implemented in a 180-nm CMOS process and achieved a signal-to-noise and distortion ratio (SNDR) of 101.6 dB with an SNDR-based Schreier figure-of-merit of 174.8 dB at a sampling frequency of 2.56 MHz.

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A 101.6-dB-SNDR Fully Dynamic Zoom ADC Using Miller-Compensated Floating Inverter Amplifiers

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

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