A 1.6 v 1.4 Gbp/s/pin consumer DRAM with self-dynamic voltage scaling technique in 44 nm CMOS technology

Hyun Woo Lee, Ki Han Kim, Young Kyoung Choi, Ju Hwan Sohn, Nak Kyu Park, Kwan Weon Kim, Chulwoo Kim, Young Jung Choi, Byong Tae Chung

Research output: Contribution to journalArticlepeer-review

15 Citations (Scopus)


A 512 Mbit consumer DDR2 SDRAM that uses self-dynamic voltage scaling (SDVS) and adaptive design techniques is introduced in this paper. With the increase in the significance of process variation, higher performance requirements reduce the allowable design margin in DRAM circuits. However, self-dynamic voltage scaling gives a greater timing margin in the circuitry by changing the internal supply voltage in response to the operating frequency and process skew. By changing the internal supply voltage, the life time of the chip increases by more than 23 times when the supply voltage is lowered by 300 mV. The proposed adaptive design techniques include an adaptive bandwidth delay-locked loop and an adaptive clock gating. The former improves the performance by obtaining a wider valid data window and the latter saves on dynamic power consumption in the clock distribution network. The SDVS method reduces the IDD3P by 9.3% and the adaptive clock gating saves 8.8% of the IDD3N when measured at 200 MHz, 25°C The studied consumer DDR2 SDRAM was fabricated using 44 nm standard DRAM process technology. It occupies a 17.7 mm 2 die area and operates using a 1.8 V power supply.

Original languageEnglish
Article number6025220
Pages (from-to)131-140
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Issue number1
Publication statusPublished - 2012 Jan


  • Adaptive bandwidth delay-locked loop(DLL)
  • adaptive clock gating
  • adaptive design technique
  • consumer DRAMs
  • dynamic voltage scaling (DVS)
  • frequency-aware design
  • life-time
  • low-power design
  • output enable control
  • process variation-aware design
  • self-reconfigurable design

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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