A 200–280 GHz InP HBT Power Amplifier Using Double-Stacked Common-Base Core With Design Analysis and Modulation Measurements

We present a WR-3.4 power amplifier (PA) using a 250-nm InP heterojunction bipolar transistor process, which exhibits a broad 3-dB bandwidth of output power. A capacitive base degeneration is applied to common-base (CB) transistors for optimizing the power performance in the terahertz frequency range. The CB transistors are stacked through analytical design guidelines, building a high-power double-stacked common-base (DS-CB) unit cell. Subsequently, two differential DS-CB unit cells are combined at the output by a broadband and low-loss four-way slotline-based power combiner. The combiner is as compact as 120 × 200 μm². Thus, the chip size is significantly reduced, occupying only 0.12 mm² for the PA core. The measurement shows that the PA has a peak gain of 18.9 dB at 243 GHz and a small-signal 3-dB bandwidth of 17.8 GHz from 228.5 to 246.3 GHz. The saturated output power (P_sat) is 11.5 dBm at 235 GHz and a 3-dB bandwidth of P_sat is as wide as 80 GHz from 200 to 280 GHz. The PA was also tested with various modulation signals of quadrature phase shift keying (QPSK), 16-quadrature amplitude modulation (QAM), and 32-QAM. The rms error vector magnitude values of −14.8, −19.5, and −23.2 dB were measured with corresponding average output powers (P_avg) of 5.4, 2.3, and 1.6 dBm for the QPSK, 16-QAM, and 32-QAM signals, respectively, at a carrier frequency of 242 GHz.