A 25-Gb/s Single-Ended PAM-4 Transmitter With iPWM-Based FFE and RLM-Matched Voltage-Mode Driver for High-Speed Memory Interfaces

This paper presents a 25-Gb/s single-ended four-level pulse amplitude modulation (PAM-4) transmitter (TX) with an integrated pulse width modulation (iPWM)-based feed-forward equalizer (FFE) and a ratio of level mismatch (RLM)-matched voltage-mode driver for high-speed memory interfaces. The phase-domain iPWM-based PAM-4 FFE is proposed to minimize the input/output (I/O) capacitance by equalizing the PAM-4 data in advance of the pre-driver. The TX bandwidth is increased while achieving superior energy efficiency. Moreover, the RLM-matched voltage-mode PAM-4 driver with a ZQ calibration is proposed to compensate for the impedance variation from the four output levels and improve the output linearity. An RLM control pull-up transistor in the proposed driver obviates the need for a data encoder or passive resistors to improve the RLM and occupies a small area. The proposed single-ended PAM-4 TX was fabricated in a 28-nm CMOS technology and occupies 0.005 mm<inline-formula> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula>. It achieves 0.43 pJ/b at 25 Gb/s and an RLM of 99.3%.