A 300-GHz SPST Switch with a new coupled-line topology in 65-nm CMOS technology

Jungsoo Kim; Sooyeon Kim; Kiryong Song; Jae Sung Rieh

doi:10.1109/TTHZ.2019.2898815

A 300-GHz SPST Switch with a new coupled-line topology in 65-nm CMOS technology

Jungsoo Kim, Sooyeon Kim, Kiryong Song, Jae Sung Rieh

School of Electrical Engineering

Research output: Contribution to journal › Review article › peer-review

5 Citations (Scopus)

Abstract

A single-pole single-throw (SPST) switch operating around 300 GHz has been developed in this letter based on a 65-nm CMOS technology. The SPST switch adopts a novel coupled-line topology, in which MOSFETs are employed as a variable impedance component at the through- A nd coupled-ports to achieve a large isolation. Over the measured frequency band of 220-320 GHz, a minimum insertion loss of 3.9 dB (at 303 GHz) and a maximum isolation of 66 dB (at 250 GHz) were obtained. This achieved peak isolation is the largest value obtained so far beyond 100 GHz with a CMOS switch. An isolation larger than 39 dB was maintained for the entire frequency band measured. The measured return loss showed a maximum value of 29 dB at 312 GHz.

Original language	English
Article number	8638971
Pages (from-to)	215-218
Number of pages	4
Journal	IEEE Transactions on Terahertz Science and Technology
Volume	9
Issue number	2
DOIs	https://doi.org/10.1109/TTHZ.2019.2898815
Publication status	Published - 2019 Mar

Bibliographical note

Funding Information:
This work was supported by the Institute for Information and Communications Technology Planning and Evaluation grant funded by the Korea government (MSIT) under Grant B0717-16-0047.

Funding Information:
Manuscript received October 22, 2018; revised December 20, 2018 and January 28, 2019; accepted February 4, 2019. Date of publication February 11, 2019; date of current version March 4, 2019. This work was supported by the Institute for Information & Communications Technology Planning & Evaluation grant funded by the Korea government (MSIT) under Grant B0717-16-0047. (Corresponding author: Jae-Sung Rieh.) The authors are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail:, kjs132456@gmail.com; ryoungi@ korea.ac.kr; acoor@korea.ac.kr; jsrieh@korea.ac.kr).

Publisher Copyright:
© 2019 IEEE.

Keywords

CMOS technology
THz
coupled line
single-pole single-throw (SPST)
switches

ASJC Scopus subject areas

Radiation
Electrical and Electronic Engineering

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10.1109/TTHZ.2019.2898815

Cite this

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title = "A 300-GHz SPST Switch with a new coupled-line topology in 65-nm CMOS technology",

abstract = "A single-pole single-throw (SPST) switch operating around 300 GHz has been developed in this letter based on a 65-nm CMOS technology. The SPST switch adopts a novel coupled-line topology, in which MOSFETs are employed as a variable impedance component at the through- A nd coupled-ports to achieve a large isolation. Over the measured frequency band of 220-320 GHz, a minimum insertion loss of 3.9 dB (at 303 GHz) and a maximum isolation of 66 dB (at 250 GHz) were obtained. This achieved peak isolation is the largest value obtained so far beyond 100 GHz with a CMOS switch. An isolation larger than 39 dB was maintained for the entire frequency band measured. The measured return loss showed a maximum value of 29 dB at 312 GHz.",

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author = "Jungsoo Kim and Sooyeon Kim and Kiryong Song and Rieh, {Jae Sung}",

note = "Funding Information: This work was supported by the Institute for Information and Communications Technology Planning and Evaluation grant funded by the Korea government (MSIT) under Grant B0717-16-0047. Funding Information: Manuscript received October 22, 2018; revised December 20, 2018 and January 28, 2019; accepted February 4, 2019. Date of publication February 11, 2019; date of current version March 4, 2019. This work was supported by the Institute for Information & Communications Technology Planning & Evaluation grant funded by the Korea government (MSIT) under Grant B0717-16-0047. (Corresponding author: Jae-Sung Rieh.) The authors are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail:, kjs132456@gmail.com; ryoungi@ korea.ac.kr; acoor@korea.ac.kr; jsrieh@korea.ac.kr). Publisher Copyright: {\textcopyright} 2019 IEEE.",

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N1 - Funding Information: This work was supported by the Institute for Information and Communications Technology Planning and Evaluation grant funded by the Korea government (MSIT) under Grant B0717-16-0047. Funding Information: Manuscript received October 22, 2018; revised December 20, 2018 and January 28, 2019; accepted February 4, 2019. Date of publication February 11, 2019; date of current version March 4, 2019. This work was supported by the Institute for Information & Communications Technology Planning & Evaluation grant funded by the Korea government (MSIT) under Grant B0717-16-0047. (Corresponding author: Jae-Sung Rieh.) The authors are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail:, kjs132456@gmail.com; ryoungi@ korea.ac.kr; acoor@korea.ac.kr; jsrieh@korea.ac.kr). Publisher Copyright: © 2019 IEEE.

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N2 - A single-pole single-throw (SPST) switch operating around 300 GHz has been developed in this letter based on a 65-nm CMOS technology. The SPST switch adopts a novel coupled-line topology, in which MOSFETs are employed as a variable impedance component at the through- A nd coupled-ports to achieve a large isolation. Over the measured frequency band of 220-320 GHz, a minimum insertion loss of 3.9 dB (at 303 GHz) and a maximum isolation of 66 dB (at 250 GHz) were obtained. This achieved peak isolation is the largest value obtained so far beyond 100 GHz with a CMOS switch. An isolation larger than 39 dB was maintained for the entire frequency band measured. The measured return loss showed a maximum value of 29 dB at 312 GHz.

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A 300-GHz SPST Switch with a new coupled-line topology in 65-nm CMOS technology

Abstract

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Keywords

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