A 3.3 V CMOS bandgap reference (BGR) was presented in this study that utilizes MOS transistors operating in the sub-threshold region. The complexity of the circuit and the dependency of the voltage reference on power supply variations are simultaneously decreased through the use of a new compensation circuit technique. The proposed BGR is simulated using a 0.35 μm CMOS standard process. Consequently, a 5.53 ppm/°C temperature coefficient is obtained in the -40∼+125 °C temperature range, the maximum power supply rejection ratio is - 62 dB, and a 2.033 mV/V voltage line regulation is achieved for the 2.3∼ 4.3 V supply voltage. The proposed circuit dissipates a supply current of 8.89 IJA at a 3.3 V supply voltage, and the active area is 112 μm× 60 μm.
|Title of host publication||40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2018|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||4|
|Publication status||Published - 2018 Oct 26|
|Event||40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2018 - Honolulu, United States|
Duration: 2018 Jul 18 → 2018 Jul 21
|Name||Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBS|
|Other||40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2018|
|Period||18/7/18 → 18/7/21|
Bibliographical noteFunding Information:
ACKNOWLEDGMENT The authors would like to express their sincerest appreciation to the IC Design Education Center for chip fabrication. This work was supported by the National Research Foundation of Korea NRF-2017M3A9E2056461.
*Research is supported by the the National Research Foundation of Korea.
© 2018 IEEE.
ASJC Scopus subject areas
- Signal Processing
- Biomedical Engineering
- Computer Vision and Pattern Recognition
- Health Informatics