A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation

Sang Geun Bae; Gyungmin Kim; Chulwoo Kim

doi:10.1109/TCSII.2016.2624759

A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation

Sang Geun Bae, Gyungmin Kim, Chulwoo Kim

Research output: Contribution to journal › Article › peer-review

7 Citations (Scopus)

Abstract

This brief presents a spread-spectrum clock generator (SSCG) based on a subsampling phase-locked loop (SSPLL) by calibrating the spreading ratio. The proposed SSCG has a low jitter performance owing to the low in-band phase noise performance of the SSPLL. To achieve a spread-spectrum clocking, the direct voltage-controlled oscillator modulation method is used owing to the absence of a frequency divider. However, the spreading ratio (δ) can be varied by process, voltage, and temperature variations. Automatic calibration technique is proposed for a 5000-ppm spreading ratio at 5 GHz. The proposed SSCG achieves a 21-dB electromagnetic interference reduction, has a -104-dBc/Hz phase noise at 200-kHz offset, and consumes 7 mW and occupies a 0.39-mm² area in a 65-nm CMOS process.

Original language	English
Article number	7733152
Pages (from-to)	1132-1136
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	64
Issue number	10
DOIs	https://doi.org/10.1109/TCSII.2016.2624759
Publication status	Published - 2017 Oct

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Keywords

Auto-calibration
spread-spectrum clock generator (SSCG)
subsampling phase-locked loop (SSPLL)

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/TCSII.2016.2624759

Cite this

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abstract = "This brief presents a spread-spectrum clock generator (SSCG) based on a subsampling phase-locked loop (SSPLL) by calibrating the spreading ratio. The proposed SSCG has a low jitter performance owing to the low in-band phase noise performance of the SSPLL. To achieve a spread-spectrum clocking, the direct voltage-controlled oscillator modulation method is used owing to the absence of a frequency divider. However, the spreading ratio (δ) can be varied by process, voltage, and temperature variations. Automatic calibration technique is proposed for a 5000-ppm spreading ratio at 5 GHz. The proposed SSCG achieves a 21-dB electromagnetic interference reduction, has a -104-dBc/Hz phase noise at 200-kHz offset, and consumes 7 mW and occupies a 0.39-mm2 area in a 65-nm CMOS process.",

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A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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