A 6MHz CMOS reference clock generator with temperature and supply voltage compensation

Hyeonseok Hwang; Chan Hui Jeong; Chankeun Kwon; Hoonki Kim; Youngmok Jeong; Bumsoo Lee; Soo Won Kim

doi:10.1109/ICSICT.2012.6467926

A 6MHz CMOS reference clock generator with temperature and supply voltage compensation

Hyeonseok Hwang, Chan Hui Jeong, Chankeun Kwon, Hoonki Kim, Youngmok Jeong, Bumsoo Lee, Soo Won Kim

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

A 6MHz CMOS reference clock generator is presented in 0.18um CMOS process. The proposed structure adopts a current starved type ring oscillator with low drop out (LDO), and temperature compensated current bias. This structure minimized the effects of supply and temperature to frequency error. The reference clock generator achieves frequency variation of less than ±0.26% against supply variation of 3V ∼ 5V and ±0.22% against temperature variation of -20°C ∼ 100°C.

Original language	English
Title of host publication	ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
DOIs	https://doi.org/10.1109/ICSICT.2012.6467926
Publication status	Published - 2012
Event	2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 - Xi'an, China Duration: 2012 Oct 29 → 2012 Nov 1

Publication series

Name	ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Other

Other	2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012
Country/Territory	China
City	Xi'an
Period	12/10/29 → 12/11/1

ASJC Scopus subject areas

Human-Computer Interaction
Electrical and Electronic Engineering

Access to Document

10.1109/ICSICT.2012.6467926

Cite this

Hwang, H., Jeong, C. H., Kwon, C., Kim, H., Jeong, Y., Lee, B., & Kim, S. W. (2012). A 6MHz CMOS reference clock generator with temperature and supply voltage compensation. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings Article 6467926 (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2012.6467926

A 6MHz CMOS reference clock generator with temperature and supply voltage compensation. / Hwang, Hyeonseok; Jeong, Chan Hui; Kwon, Chankeun et al.
ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. 6467926 (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Hwang, H, Jeong, CH, Kwon, C, Kim, H, Jeong, Y, Lee, B & Kim, SW 2012, A 6MHz CMOS reference clock generator with temperature and supply voltage compensation. in ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings., 6467926, ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012, Xi'an, China, 12/10/29. https://doi.org/10.1109/ICSICT.2012.6467926

Hwang H, Jeong CH, Kwon C, Kim H, Jeong Y, Lee B et al. A 6MHz CMOS reference clock generator with temperature and supply voltage compensation. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. 6467926. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). doi: 10.1109/ICSICT.2012.6467926

Hwang, Hyeonseok ; Jeong, Chan Hui ; Kwon, Chankeun et al. / A 6MHz CMOS reference clock generator with temperature and supply voltage compensation. ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. 2012. (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

@inproceedings{2d95d1977c2e404889c07e7825ad8bb3,

title = "A 6MHz CMOS reference clock generator with temperature and supply voltage compensation",

abstract = "A 6MHz CMOS reference clock generator is presented in 0.18um CMOS process. The proposed structure adopts a current starved type ring oscillator with low drop out (LDO), and temperature compensated current bias. This structure minimized the effects of supply and temperature to frequency error. The reference clock generator achieves frequency variation of less than ±0.26% against supply variation of 3V ∼ 5V and ±0.22% against temperature variation of -20°C ∼ 100°C.",

author = "Hyeonseok Hwang and Jeong, {Chan Hui} and Chankeun Kwon and Hoonki Kim and Youngmok Jeong and Bumsoo Lee and Kim, {Soo Won}",

year = "2012",

doi = "10.1109/ICSICT.2012.6467926",

language = "English",

isbn = "9781467324724",

series = "ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

booktitle = "ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings",

note = "2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 ; Conference date: 29-10-2012 Through 01-11-2012",

}

TY - GEN

T1 - A 6MHz CMOS reference clock generator with temperature and supply voltage compensation

AU - Hwang, Hyeonseok

AU - Jeong, Chan Hui

AU - Kwon, Chankeun

AU - Kim, Hoonki

AU - Jeong, Youngmok

AU - Lee, Bumsoo

AU - Kim, Soo Won

PY - 2012

Y1 - 2012

N2 - A 6MHz CMOS reference clock generator is presented in 0.18um CMOS process. The proposed structure adopts a current starved type ring oscillator with low drop out (LDO), and temperature compensated current bias. This structure minimized the effects of supply and temperature to frequency error. The reference clock generator achieves frequency variation of less than ±0.26% against supply variation of 3V ∼ 5V and ±0.22% against temperature variation of -20°C ∼ 100°C.

AB - A 6MHz CMOS reference clock generator is presented in 0.18um CMOS process. The proposed structure adopts a current starved type ring oscillator with low drop out (LDO), and temperature compensated current bias. This structure minimized the effects of supply and temperature to frequency error. The reference clock generator achieves frequency variation of less than ±0.26% against supply variation of 3V ∼ 5V and ±0.22% against temperature variation of -20°C ∼ 100°C.

UR - http://www.scopus.com/inward/record.url?scp=84874893125&partnerID=8YFLogxK

U2 - 10.1109/ICSICT.2012.6467926

DO - 10.1109/ICSICT.2012.6467926

M3 - Conference contribution

AN - SCOPUS:84874893125

SN - 9781467324724

T3 - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

BT - ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

T2 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012

Y2 - 29 October 2012 through 1 November 2012

ER -

A 6MHz CMOS reference clock generator with temperature and supply voltage compensation

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