A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process

Junyoung Song; Hyun Woo Lee; Sewook Hwang; Inhwa Jung; Chulwoo Kim

doi:10.1109/ASPDAC.2013.6509570

A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process

Junyoung Song, Hyun Woo Lee, Sewook Hwang, Inhwa Jung, Chulwoo Kim

School of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A 7.5Gb/s referenceless transceiver for the ultra-high definition television is designed in a 0.13μm CMOS process. By applying the dynamic pre-emphasis calibration and the bandwidth scanning clock generators, measured eye opening and jitter of the clock are enhanced by 39.6% and 40%, respectively. Also the data-width comparison based adaptive equalizer with self-adjusting reference voltage is proposed.

Original language	English
Title of host publication	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Pages	89-90
Number of pages	2
DOIs	https://doi.org/10.1109/ASPDAC.2013.6509570
Publication status	Published - 2013
Event	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama, Japan Duration: 2013 Jan 22 → 2013 Jan 25

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Country/Territory	Japan
City	Yokohama
Period	13/1/22 → 13/1/25

ASJC Scopus subject areas

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

Access to Document

10.1109/ASPDAC.2013.6509570

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Song, J., Lee, H. W., Hwang, S., Jung, I., & Kim, C. (2013). A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process. In 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 (pp. 89-90). Article 6509570 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2013.6509570

A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process. / Song, Junyoung; Lee, Hyun Woo; Hwang, Sewook et al.
2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. 2013. p. 89-90 6509570 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Song, J, Lee, HW, Hwang, S, Jung, I & Kim, C 2013, A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process. in 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013., 6509570, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 89-90, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013, Yokohama, Japan, 13/1/22. https://doi.org/10.1109/ASPDAC.2013.6509570

Song J, Lee HW, Hwang S, Jung I, Kim C. A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process. In 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. 2013. p. 89-90. 6509570. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1109/ASPDAC.2013.6509570

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abstract = "A 7.5Gb/s referenceless transceiver for the ultra-high definition television is designed in a 0.13μm CMOS process. By applying the dynamic pre-emphasis calibration and the bandwidth scanning clock generators, measured eye opening and jitter of the clock are enhanced by 39.6% and 40%, respectively. Also the data-width comparison based adaptive equalizer with self-adjusting reference voltage is proposed.",

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A 7.5Gb/s referenceless transceiver for UHDTV with adaptive equalization and bandwidth scanning technique in 0.13μm CMOS process

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