This paper presents a lowcost PMOS-based 8T (P-8T) SRAM Compute- In-Memory (CIM) architecture that efficiently per-forms the multiplyaccumulate (MAC) operations between 4-bit input activations and 8-bit weights. First, bit-line (BL) charge-sharing technique is employed to design the low-cost and reliable digital-to-analog conversion of 4-bit input activations in the pro-posed SRAM CIM, where the charge domain analog computing provides variation tolerant and linear MAC outputs. The 16 local arrays are also effectively exploited to implement the analog mul-tiplication unit (AMU) that simultaneously produces 16 multipli-cation results between 4-bit input activations and 1-bit weights. For the hardware cost reduction of analog-to-digital converter (ADC) without sacrificing DNN accuracy, hardware aware system simulations are performed to decide the ADC bit-resolutions and the number of activated rows in the proposed CIM macro. In addition, for the ADC operation, the AMU-based reference col-umns are utilized for generating ADC reference voltages, with which low-cost 4-bit coarse-fine flash ADC has been designed. The 25680 P-8T SRAM CIM macro implementation using 28nm CMOS process shows that the proposed CIM shows the accuracies of 91.46% and 66.67% with CIFAR-10 and CIFAR-100 dataset, respectively, with the energy efficiency of 50.07-TOPS/W.
|Title of host publication||2022 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2022|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Publication status||Published - 2022 Aug 2|
|Event||2022 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2022 - Virtual, Online, United States|
Duration: 2022 Aug 1 → 2022 Aug 2
|Name||Proceedings of the International Symposium on Low Power Electronics and Design|
|Conference||2022 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2022|
|Period||22/8/1 → 22/8/2|
Bibliographical noteFunding Information:
This research was supported by the National Research Foundation of Korea grant funded by the Korea government (No. NRF-2020R1A2C3014820. The EDA tool was supported by the IC Design Education Center (IDEC), Korea.
© 2022 Copyright held by the owner/author(s).
- BL Charge-sharing
- MAC operation
ASJC Scopus subject areas