TY - GEN
T1 - A compact and high performance switch for circuit-switched network-on-chip
AU - Pham, Phi Hung
AU - Kumar, Yogendera
AU - Kim, Chulwoo
PY - 2006
Y1 - 2006
N2 - Compact switch architecture and its fast pathsetup scheme for circuit-switched on chip network adopting 4×4 torus topology has been presented. Proposed switch has been synthesized and analyzed using 0.13μm CMOS process technology. Performance evaluation shows considerable energy efficiency and almost 5 times smaller area compared to the other switches.
AB - Compact switch architecture and its fast pathsetup scheme for circuit-switched on chip network adopting 4×4 torus topology has been presented. Proposed switch has been synthesized and analyzed using 0.13μm CMOS process technology. Performance evaluation shows considerable energy efficiency and almost 5 times smaller area compared to the other switches.
UR - https://www.scopus.com/pages/publications/43749099197
UR - https://www.scopus.com/pages/publications/43749099197#tab=citedBy
U2 - 10.1109/SOCC.2006.283842
DO - 10.1109/SOCC.2006.283842
M3 - Conference contribution
AN - SCOPUS:43749099197
SN - 0780397819
SN - 9780780397811
T3 - 2006 IEEE International Systems-on-Chip Conference, SOC
SP - 53
EP - 56
BT - 2006 IEEE International Systems-on-Chip Conference, SOC
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2006 IEEE International Systems-on-Chip Conference, SOC
Y2 - 24 September 2006 through 27 September 2006
ER -