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A DC-DC converter with a dual VCDL-based ADC and a self-calibrated DLL-based clock generator for an energy-aware EISC processor
Sunghwa Ok
*
, Jungmoon Kim
, Gilwon Yoon
, Hyunho Chu
, Jaegeun Oh
,
Seon Wook Kim
,
Chulwoo Kim
*
Corresponding author for this work
Research output
:
Contribution to journal
›
Conference article
›
peer-review
7
Citations (Scopus)
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Keyphrases
Dynamic Voltage Scaling
100%
DC-DC Converter
100%
Clock Generator
100%
Dynamic Voltage Frequency Scaling
100%
Energy-aware
100%
Low Power
50%
Embedded Processor
50%
CMOS Process
50%
Supply Voltage
50%
Active Area
50%
Scaling Scheme
50%
Self-calibration
50%
System Clock
50%
Instruction Sets
50%
Digitally Controlled
50%
DC-DC Buck Converter
50%
Scaling Circuits
50%
Dynamic Power Management
50%
Low Jitter DLL
50%
Engineering
Energy Engineering
100%
DC-to-DC Converter
100%
Dynamic Frequency Scaling
100%
Voltage Scaling
100%
Power Management
50%
Supply Voltage
50%
Active Area
50%
System Clock
50%
Embedded Processor
50%
Buck Converter
50%