A delay line with highly linear thermal sensitivity for smart temperature sensor

Nguyen Thanh Trung, Kwansu Shon, Soo Won Kim

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)

    Abstract

    A highly linear thermal sensitivity delay line for smart temperature sensor is presented. The proposed delay line is a current starved inverter chain. A simple bias current source circuit is incorporated with the delay line to generate a current inversely proportional to temperature based on the transconductance characteristics of a MOS device at the vicinity of the zero temperature coefficient (ZTC) point. Simulation results in a 0.18μm CMOS technology show that the proposed delay line has a higher linearity within 0.24 °C in a wider temperature range from -40°C to 120°C compared with conventional structures.

    Original languageEnglish
    Title of host publication2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference Proceedings
    Pages899-902
    Number of pages4
    DOIs
    Publication statusPublished - 2007
    Event2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference - Montreal, QC, Canada
    Duration: 2007 Aug 52007 Aug 8

    Publication series

    NameMidwest Symposium on Circuits and Systems
    ISSN (Print)1548-3746

    Other

    Other2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference
    Country/TerritoryCanada
    CityMontreal, QC
    Period07/8/507/8/8

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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