TY - GEN
T1 - A fast-lock synchronous multi-phase clock generator based on a time-to-digital converter
AU - Shin, Dongsuk
AU - Koo, Jabeom
AU - Yun, Won Joo
AU - Young, Jung Choi
AU - Kim, Chulwoo
PY - 2009
Y1 - 2009
N2 - An all-digital fast-lock synchronous multi-phase clock generator is presented. By using a time-to-digital converter for fast-lock operation and delay measurement, the proposed multi-phase clock generator generates four-phase clocks and synchronizes the reference clock with the output clock within 45 cycles. Furthermore, the clock generator uses a fine binary scheme and de-skewing circuit for fine delay measurement and compensation. The proposed clock generator was designed in a 0.18um CMOS technology. It operates over a wide frequency range from 400MHz to 1.22GHz and consumes 34mW at 1.22GHz.
AB - An all-digital fast-lock synchronous multi-phase clock generator is presented. By using a time-to-digital converter for fast-lock operation and delay measurement, the proposed multi-phase clock generator generates four-phase clocks and synchronizes the reference clock with the output clock within 45 cycles. Furthermore, the clock generator uses a fine binary scheme and de-skewing circuit for fine delay measurement and compensation. The proposed clock generator was designed in a 0.18um CMOS technology. It operates over a wide frequency range from 400MHz to 1.22GHz and consumes 34mW at 1.22GHz.
UR - http://www.scopus.com/inward/record.url?scp=70350164597&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2009.5117670
DO - 10.1109/ISCAS.2009.5117670
M3 - Conference contribution
AN - SCOPUS:70350164597
SN - 9781424438280
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1
EP - 4
BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Y2 - 24 May 2009 through 27 May 2009
ER -