A fast-lock synchronous multi-phase clock generator based on a time-to-digital converter

Dongsuk Shin, Jabeom Koo, Won Joo Yun, Jung Choi Young, Chulwoo Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

An all-digital fast-lock synchronous multi-phase clock generator is presented. By using a time-to-digital converter for fast-lock operation and delay measurement, the proposed multi-phase clock generator generates four-phase clocks and synchronizes the reference clock with the output clock within 45 cycles. Furthermore, the clock generator uses a fine binary scheme and de-skewing circuit for fine delay measurement and compensation. The proposed clock generator was designed in a 0.18um CMOS technology. It operates over a wide frequency range from 400MHz to 1.22GHz and consumes 34mW at 1.22GHz.

Original languageEnglish
Title of host publication2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages1-4
Number of pages4
DOIs
Publication statusPublished - 2009
Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan, Province of China
Duration: 2009 May 242009 May 27

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Country/TerritoryTaiwan, Province of China
CityTaipei
Period09/5/2409/5/27

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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