Abstract
In this study, a fully integrated Phase-locked loop (PLL) that is applicable to Universal Flash Storage (UFS) systems is presented. The fully integrated PLL is realized using a MOS capacitor as an on-chip loop filter (LF). To compensate for leakage current in the LF, a leakage current compensation scheme is presented. With the leakage compensation scheme, the peak-to-peak jitter and rms jitter are 40ps and 7.62ps, respectively. The area of the LF was reduced by around a sixteenth part compared with a metal insulator metal (MIM) capacitor.
Original language | English |
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Title of host publication | 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 587-588 |
Number of pages | 2 |
ISBN (Print) | 9781479975426 |
DOIs | |
Publication status | Published - 2015 Mar 23 |
Event | 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 - Las Vegas, United States Duration: 2015 Jan 9 → 2015 Jan 12 |
Other
Other | 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 |
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Country/Territory | United States |
City | Las Vegas |
Period | 15/1/9 → 15/1/12 |
Keywords
- Fully integrated PLL
- Leakage compensation
- Leakage current
- MOS capacitor
- Phase-locked loops
- UFS
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering
- Industrial and Manufacturing Engineering