A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

Sangsu Lee; Jaehun Jun; Chulwoo Kim

doi:10.1109/ISOCC.2017.8368869

A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

Sangsu Lee, Jaehun Jun, Chulwoo Kim

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2017, ISOCC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	180-181
Number of pages	2
ISBN (Electronic)	9781538622858
DOIs	https://doi.org/10.1109/ISOCC.2017.8368869
Publication status	Published - 2018 May 29
Event	14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of Duration: 2017 Nov 5 → 2017 Nov 8

Publication series

Name	Proceedings - International SoC Design Conference 2017, ISOCC 2017

Other

Other	14th International SoC Design Conference, ISOCC 2017
Country/Territory	Korea, Republic of
City	Seoul
Period	17/11/5 → 17/11/8

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Keywords

All-Digital Phase-Locked Loop(ADPLL)
Bootstrapped Ring Oscillator(BTRO)
Low-Dropout Regulator(LDO)
Near-Threshold Voltage(NTV)
Power Supply Rejection(PSR)

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/ISOCC.2017.8368869

Cite this

Lee, S., Jun, J., & Kim, C. (2018). A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. In Proceedings - International SoC Design Conference 2017, ISOCC 2017 (pp. 180-181). (Proceedings - International SoC Design Conference 2017, ISOCC 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2017.8368869

A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. / Lee, Sangsu; Jun, Jaehun; Kim, Chulwoo.
Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 180-181 (Proceedings - International SoC Design Conference 2017, ISOCC 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, S, Jun, J & Kim, C 2018, A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. in Proceedings - International SoC Design Conference 2017, ISOCC 2017. Proceedings - International SoC Design Conference 2017, ISOCC 2017, Institute of Electrical and Electronics Engineers Inc., pp. 180-181, 14th International SoC Design Conference, ISOCC 2017, Seoul, Korea, Republic of, 17/11/5. https://doi.org/10.1109/ISOCC.2017.8368869

Lee S, Jun J, Kim C. A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. In Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc. 2018. p. 180-181. (Proceedings - International SoC Design Conference 2017, ISOCC 2017). doi: 10.1109/ISOCC.2017.8368869

Lee, Sangsu ; Jun, Jaehun ; Kim, Chulwoo. / A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations. Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 180-181 (Proceedings - International SoC Design Conference 2017, ISOCC 2017).

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abstract = "Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.",

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A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

Abstract

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Bibliographical note

Keywords

ASJC Scopus subject areas

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