A new hardware architecture for operations in GF(2n)

Chang Han Kim; Sangho Oh; Jongin Lim

doi:10.1109/12.980019

A new hardware architecture for operations in GF(2ⁿ)

Chang Han Kim, Sangho Oh, Jongin Lim

School of Cybersecurity

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

The efficient computation of the arithmetic operations in finite fields is closely related to the particular ways in which the field elements are presented. The common field representations are a polynomial basis representation and a normal basis representation. In this paper, we introduce a nonconventional basis [8] and present a new bit-parallel multiplier which is as efficient as the modified Massey-Omura multiplier [2] using the type I optimal normal basis.

Original language	English
Pages (from-to)	90-92
Number of pages	3
Journal	IEEE Transactions on Computers
Volume	51
Issue number	1
DOIs	https://doi.org/10.1109/12.980019
Publication status	Published - 2002 Jan

Bibliographical note

Funding Information:
This work is supported in part by the Ministry of Information & Communication of Korea (“Support Project of University Information Technology Research Center” supervised by IITA).

Keywords

Elliptic curve
Finite fields
Nonconventional basis
Public-key cryptosystems

ASJC Scopus subject areas

Software
Theoretical Computer Science
Hardware and Architecture
Computational Theory and Mathematics

Access to Document

10.1109/12.980019

Cite this

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