TY - JOUR
T1 - A new method for the extraction of flat-band voltage and doping concentration in Tri-gate Junctionless Transistors
AU - Jeon, D. Y.
AU - Park, S. J.
AU - Mouis, M.
AU - Barraud, S.
AU - Kim, G. T.
AU - Ghibaudo, G.
N1 - Funding Information:
This work was supported by European Union 7th Framework Program project SQWIRE under Grant Agreements No. 257111 and by the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology ( Converging Research Center Program , 2012K001313 and Global Frontier Research Program , No. 2011-0031638 ).
PY - 2013
Y1 - 2013
N2 - A new method for the extraction of flat-band voltage (Vfb) and channel doping concentration (Nd) in Tri-gate Junctionless Transistors (JLTs) is presented. The new method, based on the relationship between the top-effective width (Wtop-eff) in accumulation and the effective width (Weff′) in partial depletion, enables the extraction of Vfb and Nd of JLT devices (here as ≈0.61 V and ≈6.4 × 1018 cm-3, respectively). The validity of the new method is also proved by 2D numerical simulations. Furthermore, it is emphasized that the sidewall accumulation current (Id-side) behavior of Tri-gate JLT devices is found to decrease dramatically near Vfb, allowing an estimation of the Vfb position of JLT devices.
AB - A new method for the extraction of flat-band voltage (Vfb) and channel doping concentration (Nd) in Tri-gate Junctionless Transistors (JLTs) is presented. The new method, based on the relationship between the top-effective width (Wtop-eff) in accumulation and the effective width (Weff′) in partial depletion, enables the extraction of Vfb and Nd of JLT devices (here as ≈0.61 V and ≈6.4 × 1018 cm-3, respectively). The validity of the new method is also proved by 2D numerical simulations. Furthermore, it is emphasized that the sidewall accumulation current (Id-side) behavior of Tri-gate JLT devices is found to decrease dramatically near Vfb, allowing an estimation of the Vfb position of JLT devices.
KW - 2D numerical simulation
KW - Doping concentration (N)
KW - Effective width (W )
KW - Extraction method
KW - Flat-band voltage (V )
KW - Junctionless Transistors (JLTs)
KW - Sidewall accumulation current (I )
UR - http://www.scopus.com/inward/record.url?scp=84874685490&partnerID=8YFLogxK
U2 - 10.1016/j.sse.2012.11.011
DO - 10.1016/j.sse.2012.11.011
M3 - Article
AN - SCOPUS:84874685490
SN - 0038-1101
VL - 81
SP - 113
EP - 118
JO - Solid-State Electronics
JF - Solid-State Electronics
ER -