Abstract
In this paper, we present a algorithmic noise tolerance (ANT) technique for low-power digital signal processing systems. The proposed technique employs a low-complexity forward-backward predictor to correct errors in a main DSP (MDSP) block due to voltage overscaling, which is an ultra low-voltage operating condition. For a frequency selective FIR filtering, it is shown that the proposed technique achieves up to 43% power savings over an optimally voltage scaled MDSP with a 5% area overhead.
| Original language | English |
|---|---|
| Pages (from-to) | 331-336 |
| Number of pages | 6 |
| Journal | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation |
| Publication status | Published - 2004 |
| Event | 2004 IEEE Workshop on Signal Processing Systems Design and Implementation, Proceedings - Austin, TX, United States Duration: 2004 Oct 13 → 2004 Oct 15 |
ASJC Scopus subject areas
- Media Technology
- Signal Processing