A reliable CMOS 16: 1 binary-tree multiplexer applying delay compensation techniques

This paper describes a CMOS 16:1 binary-tree multiplexer (MUX) using 0.18-μm technology. To provide immunity for wide frequency range and process-and-temperature variations, the MUX adopts several delay compensation techniques. Simulation results show that, the proposed MUX maintains the set up margins and hold margins close to the optimal value, i.e., 0.5UI, in wide frequency-range and in wide process-and-temperature variations, with standard deviation of 0.05UI approximately. These results represent that these proposed delay compensations are effective and the reliability is much improved although CMOS logic circuits are sensitive to those variations.