A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations

Jaecheol Yun; Yun Hwan Jung; Taegeun Yoo; Yohan Hong; Ju Eon Kim; Dong Hyun Yoon; Sung Min Lee; Youngkwon Jo; Yong Sin Kim; Kwang Hyun Baek

doi:10.5573/JSTS.2017.17.3.378

A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations

Jaecheol Yun, Yun Hwan Jung, Taegeun Yoo, Yohan Hong, Ju Eon Kim, Dong Hyun Yoon, Sung Min Lee, Youngkwon Jo, Yong Sin Kim, Kwang Hyun Baek

Research output: Contribution to journal › Article › peer-review

Abstract

A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25 mm².

Original language	English
Pages (from-to)	378-386
Number of pages	9
Journal	Journal of Semiconductor Technology and Science
Volume	17
Issue number	3
DOIs	https://doi.org/10.5573/JSTS.2017.17.3.378
Publication status	Published - 2017

Bibliographical note

Funding Information:
This work was supported by the IT R&D program of MOTIE/KEIT. [10054819, Development of modular wearable platform technology for the disaster and industrial site]. It was also partially supported by the Chung-Ang University Excellent Student Scholarship in 2015.

Publisher Copyright:
© 2017, Institute of Electronics Engineers of Korea. All rights reserved.

Keywords

Digital-to-analog converter (DAC)
Return-to-zero (RZ)
Tri-state switching scheme

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.5573/JSTS.2017.17.3.378

Cite this

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title = "A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations",

abstract = "A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25 mm2.",

keywords = "Digital-to-analog converter (DAC), Return-to-zero (RZ), Tri-state switching scheme",

author = "Jaecheol Yun and Jung, {Yun Hwan} and Taegeun Yoo and Yohan Hong and Kim, {Ju Eon} and Yoon, {Dong Hyun} and Lee, {Sung Min} and Youngkwon Jo and Kim, {Yong Sin} and Baek, {Kwang Hyun}",

note = "Funding Information: This work was supported by the IT R&D program of MOTIE/KEIT. [10054819, Development of modular wearable platform technology for the disaster and industrial site]. It was also partially supported by the Chung-Ang University Excellent Student Scholarship in 2015. Publisher Copyright: {\textcopyright} 2017, Institute of Electronics Engineers of Korea. All rights reserved.",

year = "2017",

doi = "10.5573/JSTS.2017.17.3.378",

language = "English",

volume = "17",

pages = "378--386",

journal = "Journal of Semiconductor Technology and Science",

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AU - Yun, Jaecheol

AU - Jung, Yun Hwan

AU - Yoo, Taegeun

AU - Hong, Yohan

AU - Kim, Ju Eon

AU - Yoon, Dong Hyun

AU - Lee, Sung Min

AU - Jo, Youngkwon

AU - Kim, Yong Sin

AU - Baek, Kwang Hyun

N1 - Funding Information: This work was supported by the IT R&D program of MOTIE/KEIT. [10054819, Development of modular wearable platform technology for the disaster and industrial site]. It was also partially supported by the Chung-Ang University Excellent Student Scholarship in 2015. Publisher Copyright: © 2017, Institute of Electronics Engineers of Korea. All rights reserved.

PY - 2017

Y1 - 2017

N2 - A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25 mm2.

AB - A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25 mm2.

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A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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