A return-to-zero DAC with tri-state switching scheme for multiple nyquist operations

Jaecheol Yun, Yun Hwan Jung, Taegeun Yoo, Yohan Hong, Ju Eon Kim, Dong Hyun Yoon, Sung Min Lee, Youngkwon Jo, Yong Sin Kim, Kwang Hyun Baek

Research output: Contribution to journalArticlepeer-review


A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies 0.25 mm2.

Original languageEnglish
Pages (from-to)378-386
Number of pages9
JournalJournal of Semiconductor Technology and Science
Issue number3
Publication statusPublished - 2017


  • Digital-to-analog converter (DAC)
  • Return-to-zero (RZ)
  • Tri-state switching scheme

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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