TY - GEN
T1 - A slew-rate controlled output driver with one-cycle tuning time
AU - Kwaks, Young Ho
AU - Jung, Inhwa
AU - Kim, Chulwoo
PY - 2008
Y1 - 2008
N2 - A low-power slew-rate controlled output driver with open loop digital scheme, one-cycle lock time is presented. Proposed output driver maintains slew rate in the range of 2.1V/ns to 3.6V/ns in a one cycle after the enable clock is inserted. It is implemented in 0.18um CMOS process, and the control block consumes 13.7mW at 1Gbps.
AB - A low-power slew-rate controlled output driver with open loop digital scheme, one-cycle lock time is presented. Proposed output driver maintains slew rate in the range of 2.1V/ns to 3.6V/ns in a one cycle after the enable clock is inserted. It is implemented in 0.18um CMOS process, and the control block consumes 13.7mW at 1Gbps.
UR - http://www.scopus.com/inward/record.url?scp=49549124005&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=49549124005&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2008.4484070
DO - 10.1109/ASPDAC.2008.4484070
M3 - Conference contribution
AN - SCOPUS:49549124005
SN - 9781424419227
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 99
EP - 100
BT - 2008 Asia and South Pacific Design Automation Conference, ASP-DAC
T2 - 2008 Asia and South Pacific Design Automation Conference, ASP-DAC
Y2 - 21 March 2008 through 24 March 2008
ER -