A soft-error-tolerant sar adc with dual-capacitor sample-and-hold control for sensor systems

For a reliable and stable sensor system, it is essential to precisely measure various sensor signals, such as electromagnetic field, pressure, and temperature. The measured analog signal is converted into digital bits through the sensor readout system. However, in extreme radiation environments, such as in space, during flights, and in nuclear fusion reactors, the performance of the analog-to-digital converter (ADC) constituting the sensor readout system can be degraded due to soft errors caused by radiation effects, leading to system malfunction. This paper proposes a soft-errortolerant successive-approximation-register (SAR) ADC using dual-capacitor sample-and-hold (S/H) control, which has robust characteristics against total ionizing dose (TID) and single event effects (SEE). The proposed ADC was fabricated using 65-nm CMOS process, and its soft-error-tolerant performance was measured in radiation environments. Additionally, the proposed circuit techniques were verified by utilizing a radiation simulator CAD tool.