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A SPICE model of p-channel silicon tunneling field-effect transistors for logic applications
Sola Woo
, Juhee Jeon
,
Sangsig Kim
*
*
Corresponding author for this work
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Article
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peer-review
1
Citation (Scopus)
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Keyphrases
P-channel
100%
Logic Application
100%
SPICE Model
100%
Tunnel Field-effect Transistor
100%
Logic Gates
50%
Electrical Characteristics
16%
Inverter
16%
Transistor Model
16%
NOR Gate
16%
NAND Gate
16%
TCAD Simulation
16%
Conventional Tunneling
16%
TFET Inverter
16%
Engineering
Tunnel Construction
100%
Field-Effect Transistor
100%
Application Logic
100%
SPICE
100%
Logic Gate
50%
Inverter
33%
Computer Science
Effect Transistor
100%
Application Logic
100%
Logic Gate
50%
And Gate
16%
Transistor Model
16%
Material Science
Silicon
100%
Field Effect Transistor
100%
Electrical Property
16%