A SPICE model of silicon tunneling field-effect transistors

Sola Woo, Minsuk Kim, Sangsig Kim

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)


In this study, we propose a precise model of silicon tunneling field-effect transistors (TFETs) by modifying the Kane-Sze tunneling formula. In our model, a reference device is calibrated by utilizing TCAD and SPICE simulation. Electrical parameters extracted in our TCAD simulation are applied to a SPICE model not only for adopting the off-state current of a p-i-n diode under a reverse bias state but also for developing the threshold voltage and electric field equations. Furthermore, a basic complementary TFET inverter is simulated to demonstrate the capabilities of our proposed model.

Original languageEnglish
Pages (from-to)66-71
Number of pages6
JournalMicroelectronic Engineering
Publication statusPublished - 2018 May 5

Bibliographical note

Funding Information:
This work was partly supported by the National Research Foundation of Korea (NRF) Grant funded by the Korean Government (MSIP) ( NRF-2013R1A2A1A03070750 , NRF-2015R1A2A1A15055437 ), the Brain Korea 21 Plus Project in 2017, and Samsung Electronics .

Publisher Copyright:
© 2018


  • Calibration
  • Device modeling
  • SPICE model
  • TCAD simulation
  • Tunnel FET

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering


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