An Even/Odd Error Detection Based Low-Complexity Chase Decoding for Low-Latency RS Decoder Design

Jinho Jeong; Dongyeob Shin; Wongyu Shin; Jongsun Park

doi:10.1109/LCOMM.2021.3054753

An Even/Odd Error Detection Based Low-Complexity Chase Decoding for Low-Latency RS Decoder Design

Jinho Jeong, Dongyeob Shin, Wongyu Shin, Jongsun Park^*

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

This letter presents a modified low-complexity chase (LCC) algorithm, where a fewer number of vectors can be tested with minor error correction performance degradation. The proposed LCC decoding pre-determines whether the number of errors in the received codeword is even or odd, and it processes only necessary test vectors. As a result, the number of test vectors can be reduced by half compared to the conventional LCC decoding. The Reed-Solomon (255,239) decoder with the proposed LCC algorithm has been implemented using 65nm CMOS process. The hardware implementation results show that the proposed decoder shows 48.5% reduced latency with 0.06 dB of coding gain decrease at $\mathbf {10^{-6}}$ codeword error rate compared to the state-of-the-art LCC decoder.

Original language	English
Article number	9336031
Pages (from-to)	1505-1509
Number of pages	5
Journal	IEEE Communications Letters
Volume	25
Issue number	5
DOIs	https://doi.org/10.1109/LCOMM.2021.3054753
Publication status	Published - 2021 May

Bibliographical note

Publisher Copyright:
© 1997-2012 IEEE.

Keywords

Reed-Solomon (RS) codes
algebraic soft-decision decoding (ASD)
latency
low-complexity chase (LCC)

ASJC Scopus subject areas

Modelling and Simulation
Computer Science Applications
Electrical and Electronic Engineering

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10.1109/LCOMM.2021.3054753

Cite this

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title = "An Even/Odd Error Detection Based Low-Complexity Chase Decoding for Low-Latency RS Decoder Design",

abstract = "This letter presents a modified low-complexity chase (LCC) algorithm, where a fewer number of vectors can be tested with minor error correction performance degradation. The proposed LCC decoding pre-determines whether the number of errors in the received codeword is even or odd, and it processes only necessary test vectors. As a result, the number of test vectors can be reduced by half compared to the conventional LCC decoding. The Reed-Solomon (255,239) decoder with the proposed LCC algorithm has been implemented using 65nm CMOS process. The hardware implementation results show that the proposed decoder shows 48.5\% reduced latency with 0.06 dB of coding gain decrease at \$\textbackslash{}mathbf \{10\textasciicircum{}\{-6\}\}\$ codeword error rate compared to the state-of-the-art LCC decoder.",

keywords = "Reed-Solomon (RS) codes, algebraic soft-decision decoding (ASD), latency, low-complexity chase (LCC)",

author = "Jinho Jeong and Dongyeob Shin and Wongyu Shin and Jongsun Park",

note = "Publisher Copyright: {\textcopyright} 1997-2012 IEEE.",

year = "2021",

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doi = "10.1109/LCOMM.2021.3054753",

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T1 - An Even/Odd Error Detection Based Low-Complexity Chase Decoding for Low-Latency RS Decoder Design

AU - Jeong, Jinho

AU - Shin, Dongyeob

AU - Shin, Wongyu

AU - Park, Jongsun

PY - 2021/5

Y1 - 2021/5

N2 - This letter presents a modified low-complexity chase (LCC) algorithm, where a fewer number of vectors can be tested with minor error correction performance degradation. The proposed LCC decoding pre-determines whether the number of errors in the received codeword is even or odd, and it processes only necessary test vectors. As a result, the number of test vectors can be reduced by half compared to the conventional LCC decoding. The Reed-Solomon (255,239) decoder with the proposed LCC algorithm has been implemented using 65nm CMOS process. The hardware implementation results show that the proposed decoder shows 48.5% reduced latency with 0.06 dB of coding gain decrease at $\mathbf {10^{-6}}$ codeword error rate compared to the state-of-the-art LCC decoder.

AB - This letter presents a modified low-complexity chase (LCC) algorithm, where a fewer number of vectors can be tested with minor error correction performance degradation. The proposed LCC decoding pre-determines whether the number of errors in the received codeword is even or odd, and it processes only necessary test vectors. As a result, the number of test vectors can be reduced by half compared to the conventional LCC decoding. The Reed-Solomon (255,239) decoder with the proposed LCC algorithm has been implemented using 65nm CMOS process. The hardware implementation results show that the proposed decoder shows 48.5% reduced latency with 0.06 dB of coding gain decrease at $\mathbf {10^{-6}}$ codeword error rate compared to the state-of-the-art LCC decoder.

KW - Reed-Solomon (RS) codes

KW - algebraic soft-decision decoding (ASD)

KW - latency

KW - low-complexity chase (LCC)

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An Even/Odd Error Detection Based Low-Complexity Chase Decoding for Low-Latency RS Decoder Design

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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