Abstract
A robust, time-dependent stress methodology for investigating "mixed-mode" (simultaneous high JC and high V CB) reliability degradation in advanced SiGe HBTs is introduced. We present comprehensive stress data on scaled 120 GHz SiGe HBTs, and use specially designed test structures with variable emitter-to-shallow trench spacing to shed light on the resultant damage mechanisms. We also employ calibrated MEDICI simulations using the hot carrier injection current technique to better understand the damage mechanisms, and conclude by assessing the impact of mixed-mode stress in aggressively scaled 200 GHz SiGe HBTs.
Original language | English |
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Pages (from-to) | 185-188 |
Number of pages | 4 |
Journal | Technical Digest - International Electron Devices Meeting |
Publication status | Published - 2003 |
Externally published | Yes |
Event | IEEE International Electron Devices Meeting - Washington, DC, United States Duration: 2003 Dec 8 → 2003 Dec 10 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry