We investigated the deep-level traps formed in Cr-SrTiO 3/Si 3N 4/SiO 2 structures deposited on n-type Si by deep-level transient spectroscopy (DLTS). Three electron traps, with averaged activation energies of 0.24, 0.28, and 0.53 eV, were observed below the conduction band minimum of Si. Different behaviors in the dependence of DLTS on both filling bias and pulse confirm that the traps originate as the Si 3N 4 bulk trap, the Si 3N 4/SiO 2 interfacial trap, and the Si/SiO 2 interfacial trap. We also demonstrate that a specific point defect is the source of memory behavior in Cr-SrTiO 3-based fusion-type charge trap flash (CTF) memory devices.
|Journal||Applied Physics Letters|
|Publication status||Published - 2012 Jun 11|
ASJC Scopus subject areas
- Physics and Astronomy (miscellaneous)