Analysis of electronic memory traps in the oxide-nitride-oxide structure of a polysilicon-oxide-nitride-oxide-semiconductor flash memory

T. G. Kim, Y. J. Seo, K. C. Kim, Y. M. Sung, H. Y. Cho, M. S. Joo, S. H. Pyi

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    30 Citations (Scopus)

    Abstract

    The origin of the electron memory trap in an oxide-nitride-oxide structure deposited on n -type Si is investigated by both capacitance-voltage and deep level transient spectroscopy (DLTS). Two electron traps are observed near 0.27 and 0.54 eV, below the conduction band minimum of Si and are identified as the nitride bulk trap and the Si-Si O2 interfacial trap, respectively. The trap depth, viz., vertical distribution of the electron trap, in both nitride bulk and Si-Si O2 interface, are also estimated from the bias voltage dependent DLTS.

    Original languageEnglish
    Article number132104
    JournalApplied Physics Letters
    Volume92
    Issue number13
    DOIs
    Publication statusPublished - 2008

    Bibliographical note

    Funding Information:
    This work was supported by the MOST/KOSEF through the Quantum Photonic Science Research Center, Korea.

    Copyright:
    Copyright 2008 Elsevier B.V., All rights reserved.

    ASJC Scopus subject areas

    • Physics and Astronomy (miscellaneous)

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