Analytical calculation and fabrication of FET-embedded capacitive micromachined ultrasonic transducer

Jin Soo Park, Jung Yeon Kim, Ji Hoon Lee, Hee Kyoung Bae, Jinsik Kim, Kyo Seon Hwang, Jung Ho Park, Rino Choi, Byung Chul Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)


In this paper, we present a full analytical model that can simulate an entire CMUT-FET structure with high accuracy and fast computation. Using the proposed analytical model, electromechanical properties, electrical characteristics (Id-Vg), and pressure sensitivity of the CMUT-FET are simulated and analyzed. The optimal bias point of the CMUT-FET is found to be 1.3 V (Sub-threshold operation), at which the calculated pressure sensitivity is 2.584 × 10-6 Pa-1. This optimum bias point is almost 11 times lower than 80 % pull-in voltage for conventional high-frequency CMUTs. As a consecutive work, we also report on a fabrication process of the CMUT-FET with nickel-silicided source/drain junctions and low-temperature wafer bonding. The low-temperature wafer bonding successfully demonstrates the direct integration of CMUT on FET, which is verified via cross-sectional inspection. The fabrication technique is a promising solution and can be developed further to for integration with ICs.

Original languageEnglish
Title of host publication2017 IEEE International Ultrasonics Symposium, IUS 2017
PublisherIEEE Computer Society
ISBN (Electronic)9781538633830
Publication statusPublished - 2017 Oct 31
Event2017 IEEE International Ultrasonics Symposium, IUS 2017 - Washington, United States
Duration: 2017 Sept 62017 Sept 9

Publication series

NameIEEE International Ultrasonics Symposium, IUS
ISSN (Print)1948-5719
ISSN (Electronic)1948-5727


Other2017 IEEE International Ultrasonics Symposium, IUS 2017
Country/TerritoryUnited States

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by the KIST institutional program (2E26180) and Nano͎ Material Technology Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning (2015M3A7B7045470). The FET part and low temperature wafer bonding processes were done at Korea National Nanofab Center (NNFC, Daejeon, South Korea) and other post fabrication processes were executed at KIST Micro-Nano Fabrication Center (Seoul, South Korea).

Publisher Copyright:
© 2017 IEEE.


  • Analytical model
  • Field-effect transistor-embedded capacitive micromachined ultrasonic transducer (CMUT-FET)
  • High-frequency operation
  • Low-temperature wafer bonding

ASJC Scopus subject areas

  • Acoustics and Ultrasonics


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