Behavior of subthreshold conduction in junctionless transistors

So Jeong Park; Dae Young Jeon; Laurent Montès; Mireille Mouis; Sylvain Barraud; Gyu Tae Kim; Gérard Ghibaudo

doi:10.1016/j.sse.2016.06.007

Behavior of subthreshold conduction in junctionless transistors

So Jeong Park, Dae Young Jeon, Laurent Montès, Mireille Mouis, Sylvain Barraud, Gyu Tae Kim, Gérard Ghibaudo

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

In this work, the effect of high channel doping concentration and unique structure of junctionless transistors (JLTs) is investigated in the subthreshold conduction regime. Both experimental results and simulation work show that JLTs have reduced portion of the diffusion conduction and lower effective barrier height between source/drain and the silicon channel in subthreshold regime, compared to conventional inversion-mode (IM) transistors. Finally, it leads to a relatively large DIBL value in JLTs, owing to degraded gate controllability on channel region and strong drain bias effect. However, JLTs showed a better immunity against short channel effect in terms of degradation of the effective barrier height value.

Original language	English
Pages (from-to)	58-63
Number of pages	6
Journal	Solid-State Electronics
Volume	124
DOIs	https://doi.org/10.1016/j.sse.2016.06.007
Publication status	Published - 2016 Oct 1

Bibliographical note

Funding Information:
This work was supported by European Union 7th Framework Program project SQWIRE under Grant agreements No. 257111 and by the Center for Advanced Soft-Electronics funded by the Ministry of Science, ICT and Future Planning as Global Frontier Projec t (No. 2014M3A6A5060942 ). This research was also supported by the MSIP ( Ministry of Science, ICT and Future Planning ), Korea, under the ITRC ( Information Technology Research Center ) support program ( IITP-2015-R0992-15-1017 ) supervised by the IITP ( Institute for Information & communications Technology Promotion ).

Publisher Copyright:
© 2016 Elsevier Ltd

Keywords

DIBL
Diffusion current
Junctionless transistors (JLT)
Less effective barrier height
Subthreshold conduction
Subthreshold slope

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1016/j.sse.2016.06.007

Cite this

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title = "Behavior of subthreshold conduction in junctionless transistors",

abstract = "In this work, the effect of high channel doping concentration and unique structure of junctionless transistors (JLTs) is investigated in the subthreshold conduction regime. Both experimental results and simulation work show that JLTs have reduced portion of the diffusion conduction and lower effective barrier height between source/drain and the silicon channel in subthreshold regime, compared to conventional inversion-mode (IM) transistors. Finally, it leads to a relatively large DIBL value in JLTs, owing to degraded gate controllability on channel region and strong drain bias effect. However, JLTs showed a better immunity against short channel effect in terms of degradation of the effective barrier height value.",

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note = "Funding Information: This work was supported by European Union 7th Framework Program project SQWIRE under Grant agreements No. 257111 and by the Center for Advanced Soft-Electronics funded by the Ministry of Science, ICT and Future Planning as Global Frontier Projec t (No. 2014M3A6A5060942 ). This research was also supported by the MSIP ( Ministry of Science, ICT and Future Planning ), Korea, under the ITRC ( Information Technology Research Center ) support program ( IITP-2015-R0992-15-1017 ) supervised by the IITP ( Institute for Information & communications Technology Promotion ). Publisher Copyright: {\textcopyright} 2016 Elsevier Ltd",

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AU - Park, So Jeong

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AU - Montès, Laurent

AU - Mouis, Mireille

AU - Barraud, Sylvain

AU - Kim, Gyu Tae

AU - Ghibaudo, Gérard

N1 - Funding Information: This work was supported by European Union 7th Framework Program project SQWIRE under Grant agreements No. 257111 and by the Center for Advanced Soft-Electronics funded by the Ministry of Science, ICT and Future Planning as Global Frontier Projec t (No. 2014M3A6A5060942 ). This research was also supported by the MSIP ( Ministry of Science, ICT and Future Planning ), Korea, under the ITRC ( Information Technology Research Center ) support program ( IITP-2015-R0992-15-1017 ) supervised by the IITP ( Institute for Information & communications Technology Promotion ). Publisher Copyright: © 2016 Elsevier Ltd

PY - 2016/10/1

Y1 - 2016/10/1

N2 - In this work, the effect of high channel doping concentration and unique structure of junctionless transistors (JLTs) is investigated in the subthreshold conduction regime. Both experimental results and simulation work show that JLTs have reduced portion of the diffusion conduction and lower effective barrier height between source/drain and the silicon channel in subthreshold regime, compared to conventional inversion-mode (IM) transistors. Finally, it leads to a relatively large DIBL value in JLTs, owing to degraded gate controllability on channel region and strong drain bias effect. However, JLTs showed a better immunity against short channel effect in terms of degradation of the effective barrier height value.

AB - In this work, the effect of high channel doping concentration and unique structure of junctionless transistors (JLTs) is investigated in the subthreshold conduction regime. Both experimental results and simulation work show that JLTs have reduced portion of the diffusion conduction and lower effective barrier height between source/drain and the silicon channel in subthreshold regime, compared to conventional inversion-mode (IM) transistors. Finally, it leads to a relatively large DIBL value in JLTs, owing to degraded gate controllability on channel region and strong drain bias effect. However, JLTs showed a better immunity against short channel effect in terms of degradation of the effective barrier height value.

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KW - Diffusion current

KW - Junctionless transistors (JLT)

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KW - Subthreshold slope

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SP - 58

EP - 63

JO - Solid-State Electronics

JF - Solid-State Electronics

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Behavior of subthreshold conduction in junctionless transistors

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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