Abstract
The paper revisits three distributed shared memory (DSM) architectures to clarify them with their binding times for new addresses at the local memory: page fault time, node miss time, and cache miss time. The DSM architectures which have different binding times arrange data in different ways with different overheads at an event of reference. Since a large number of cache misses can occur in a large (relative to the cache size) working set, binding at the page fault time alone cannot efficiently utilize locality of reference at the local memory. In a small working set, most of the addresses bound to the local memory at a node miss time are not effective due to the low cache miss rate. The paper shows that binding at the cache miss time can improve system performance.
Original language | English |
---|---|
Title of host publication | Proceedings - 1998 International Conference on Parallel Processing, ICPP 1998 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 198-206 |
Number of pages | 9 |
Volume | Part F133941 |
ISBN (Electronic) | 0818686502 |
DOIs | |
Publication status | Published - 1998 Jan 1 |
Externally published | Yes |
Event | 1998 International Conference on Parallel Processing, ICPP 1998 - Minneapolis, United States Duration: 1998 Aug 10 → 1998 Aug 14 |
Other
Other | 1998 International Conference on Parallel Processing, ICPP 1998 |
---|---|
Country/Territory | United States |
City | Minneapolis |
Period | 98/8/10 → 98/8/14 |
ASJC Scopus subject areas
- Software
- Mathematics(all)
- Hardware and Architecture