Boltzmann Switching MoS2 Metal–Semiconductor Field-Effect Transistors Enabled by Monolithic-Oxide-Gapped Metal Gates at the Schottky–Mott Limit

  • Yeon Ho Kim
  • , Wei Jiang
  • , Donghun Lee
  • , Donghoon Moon
  • , Hyun Young Choi
  • , June Chul Shin
  • , Yeonsu Jeong
  • , Jong Chan Kim
  • , Jaeho Lee
  • , Woong Huh
  • , Chang Yong Han
  • , Jae Pil So
  • , Tae Soo Kim
  • , Seong Been Kim
  • , Hyun Cheol Koo
  • , Gunuk Wang
  • , Kibum Kang
  • , Hong Gyu Park
  • , Hu Young Jeong
  • , Seongil Im
  • Gwan Hyoung Lee, Tony Low, Chul Ho Lee*
*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

13 Citations (Scopus)

Abstract

A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal–semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS2) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5 V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of ≈60 mV dec−1 and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (EF) pinning-free gate stack at the Schottky–Mott limit. Furthermore, authors experimentally and theoretically confirm that EF depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS2 channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics.

Original languageEnglish
Article number2314274
JournalAdvanced Materials
Volume36
Issue number29
DOIs
Publication statusPublished - 2024 Jul 18

Bibliographical note

Publisher Copyright:
© 2024 The Authors. Advanced Materials published by Wiley-VCH GmbH.

Keywords

  • 2D semiconductors
  • Fermi-level pinning
  • MoS
  • low-power electronics
  • metal–semiconductor field-effect transistors

ASJC Scopus subject areas

  • General Materials Science
  • Mechanics of Materials
  • Mechanical Engineering

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