Capless LDO Regulator Achieving -76 dB PSR and 96.3 fs FOM

Seong Jin Yun, Jeong Seok Kim, Yong Sin Kim

Research output: Contribution to journalArticlepeer-review

35 Citations (Scopus)


The performance of switching devices such as display driver ICs is degraded by large power supply noise at switching frequencies from a few hundreds of kilohertz to a few megahertz. In order to minimize the power supply noise, a low-dropout (LDO) regulator with higher power supply rejection (PSR) is essential. In this brief, a capless LDO regulator with a negative capacitance circuit and voltage damper is proposed for enhancing PSR and figure of merit (FOM), respectively, in switching devices. The proposed LDO regulator is fabricated in a 0.18 μm CMOS. Measurement results show that the proposed LDO regulator achieves -76 dB PSR at 1 MHz and 96.3 fs FOM with a total on-chip capacitance of as small as 12.7 pF.

Original languageEnglish
Article number7744496
Pages (from-to)1147-1151
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number10
Publication statusPublished - 2017 Oct


  • Low-dropout (LDO) regulator
  • negative capacitance
  • power supply rejection (PSR)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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