Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM

Gyuseong Kang, Jongsun Park

Research output: Contribution to journalArticlepeer-review

10 Citations (Scopus)


In spin-orbit torque magnetic random access memory (SOT-MRAM), as write energy is much larger than read energy, writing data to memory only when the new data is different from the stored data can lead to considerable write energy savings. In this paper, we propose three low-power techniques that can significantly reduce write energy in the read-compare-write process. In the proposed approaches, redundant charge in read operation has been efficiently reused to generate a negative voltage for write assistance, which leads to short write time. A selective precharging technique is also proposed to minimize the voltage swings between read and write operations. In addition, asymmetric write current due to source degeneration of write transistor can be resolved with the write voltage suppression scheme. Our circuit simulations with 65-nm CMOS technology show that when the stored data and new data are the same, up to 61% of write energy savings have been achieved compared with the conventional 2T-1MTJ cell. When the proposed SOT-MRAM is used as L3 caches of X86 processor, the gem5 simulations also show that average 48.2% of write energy savings can be achieved in various workloads of SPEC2006.

Original languageEnglish
Article number8667706
Pages (from-to)1343-1352
Number of pages10
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number6
Publication statusPublished - 2019 Jun

Bibliographical note

Funding Information:
Manuscript received September 18, 2018; revised January 10, 2019; accepted February 11, 2019. Date of publication March 15, 2019; date of current version May 22, 2019. This work was supported in part by the National Research Foundation of Korea under Grant NRF-2016R1A2B4015329 and Grant NRF-2015M3D1A1070465, and in part by the Ministry of Science and ICT, South Korea, through the Information Technology Research Center support Program supervised by the Institute for Information & communications Technology Promotion (IITP) under Grant IITP-2018-0-01433. (Corresponding author: Jongsun Park.) The authors are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail:;

Publisher Copyright:
© 2019 IEEE.


  • SOT magnetic random access memory (SOT-MRAM)
  • Spin-orbit torque (SOT)
  • write power reduction

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


Dive into the research topics of 'Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM'. Together they form a unique fingerprint.

Cite this