Comparison of two layout options for 110-GHz CMOS LC cross-coupled oscillators

Doyoon Kim; Jae Sung Rieh

doi:10.26866/jees.2018.18.2.141

Comparison of two layout options for 110-GHz CMOS LC cross-coupled oscillators

Doyoon Kim, Jae Sung Rieh

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.

Original language	English
Pages (from-to)	141-143
Number of pages	3
Journal	Journal of Electromagnetic Engineering and Science
Volume	18
Issue number	2
DOIs	https://doi.org/10.26866/jees.2018.18.2.141
Publication status	Published - 2018 Apr 1

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. NRF-2015R1A2A1A05001836).

Publisher Copyright:
© The Korean Institute of Electromagnetic Engineering and Science.

Keywords

65-nm CMOS
LC cross-coupled
Layout
Oscillators
Signal generation

ASJC Scopus subject areas

Radiation
Instrumentation
Computer Networks and Communications
Electrical and Electronic Engineering

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10.26866/jees.2018.18.2.141

Cite this

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abstract = "Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.",

keywords = "65-nm CMOS, LC cross-coupled, Layout, Oscillators, Signal generation",

author = "Doyoon Kim and Rieh, {Jae Sung}",

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AU - Rieh, Jae Sung

N1 - Funding Information: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. NRF-2015R1A2A1A05001836). Publisher Copyright: © The Korean Institute of Electromagnetic Engineering and Science.

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N2 - Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.

AB - Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.

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KW - LC cross-coupled

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KW - Signal generation

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Comparison of two layout options for 110-GHz CMOS LC cross-coupled oscillators

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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