Abstract
Two 110-GHz oscillators have been developed in 65-nm CMOS technology. To study the effect of layout on the circuit performance, both oscillators had the same LC cross-coupled topology but different layout schemes of the circuit. The oscillator with the conventional cross-coupled design (OSC1), showed an output power of -3.9 dBm at 111 GHz with a phase noise of -75 dBc/Hz at 1-MHz offset. On the other hand, OSC2, with a modified cross-coupled line layout, generated an output power of -2.0 dBm at 117 GHz with a phase noise of -77 dBc/Hz at 1-MHz offset. The result indicates that the optimized layout can improve key oscillator performances such as oscillation frequency and output power.
Original language | English |
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Pages (from-to) | 141-143 |
Number of pages | 3 |
Journal | Journal of Electromagnetic Engineering and Science |
Volume | 18 |
Issue number | 2 |
DOIs | |
Publication status | Published - 2018 Apr 1 |
Bibliographical note
Funding Information:This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. NRF-2015R1A2A1A05001836).
Publisher Copyright:
© The Korean Institute of Electromagnetic Engineering and Science.
Keywords
- 65-nm CMOS
- LC cross-coupled
- Layout
- Oscillators
- Signal generation
ASJC Scopus subject areas
- Radiation
- Instrumentation
- Computer Networks and Communications
- Electrical and Electronic Engineering