Skip to main navigation
Skip to search
Skip to main content
Korea University Home
Home
Profiles
Research units
Research output
Press/Media
Search by expertise, name or affiliation
Compiler analysis for cache coherence: interprocedural array data-flow analysis and its impact on cache performance
Lynn Choi
, Pen Chung Yew
School of Electrical Engineering
Research output
:
Contribution to journal
›
Article
›
peer-review
3
Citations (Scopus)
Overview
Fingerprint
Fingerprint
Dive into the research topics of 'Compiler analysis for cache coherence: interprocedural array data-flow analysis and its impact on cache performance'. Together they form a unique fingerprint.
Sort by
Weight
Alphabetically
Mathematics
Cache Coherence
100%
Cache
69%
Data Flow
62%
Compiler
62%
Performance
27%
Locality
21%
Shared-memory multiprocessors
20%
Parallelizing Compilers
11%
Reuse
8%
Bottom-up
7%
Hardware
7%
Violate
7%
Eliminate
5%
Benchmark
5%
Minimise
4%
Scalar
4%
Simulation
3%
Computing
3%
Context
3%
Demonstrate
3%
Graph in graph theory
2%
Engineering & Materials Science
Data flow analysis
66%
Data storage equipment
10%
Computer hardware
3%