Compiler techniques for energy saving in instruction caches of speculative parallel microarchitectures

Keyphrases

• Energy Saving 100%
• Microarchitecture 100%
• Compiler 100%
• Compiler Technique 100%
• Instruction Cache 100%
• Caching 66%
• Compiler Assisted 66%
• Cache Prediction 66%
• Cell Phone 33%
• Parallelization 33%
• Numerical Program 33%
• Prediction Scheme 33%
• Energy Reduction 33%
• Laptop 33%
• Mobile Computing Devices 33%
• Cache Power 33%
• Non numerical 33%
• Software Scheme 33%
• Chip Integration 33%
• Optimizing Compilers 33%
• Emerging Architectures 33%

Computer Science

• Energy Saving 100%
• Microarchitecture 100%
• Instruction Cache 100%
• Parallelization 33%
• Cellular Phone 33%
• Target Machine 33%
• Mobile Computing Device 33%
• Optimizing Compiler 33%
• Computer Hardware 33%