Conducting-interlayer SiO_x memory devices on rigid and flexible substrates

SiO_x memory devices that offer significant improvement in switching performance were fabricated at room temperature with conducting interlayers such as Pd, Ti, carbon, or multilayer graphene. In particular, the Pd-interlayer SiO_x memory devices exhibited improvements in lowering the electroforming voltages and threshold voltages as the number of inserted Pd layers was increased, as compared to a pure SiO_x memory structure. In addition, we demonstrated that the Pd-interlayer SiO_x junction fabricated on a flexible substrate maintained low electroforming voltage and mechanically stable switching properties. From these observations, a possible switching mechanism is discussed based on the formation of individual conducting paths at the weakest edge regions of each SiO_x film, where the normalized bond-breaking probability of SiO_x is influenced by the voltage and the thickness of SiO_x. This fabrication approach offers a useful structural platform for next-generation memory applications for enhancement of the switching properties while maintaining a low-temperature fabrication method that is even amenable with flexible substrates.