TY - GEN
T1 - Data acquisition system for multi channel silicon drift diode-based detector
AU - Kim, Yongkwon
AU - Moon, Jae Kook
AU - Lee, Jonghee
AU - Yoon, Kyuyoung
AU - Ahn, Yongbok
AU - Bae, Seungbin
AU - Lee, Hakjae
AU - Lee, Kisung
AU - Joung, Jinhun
PY - 2008
Y1 - 2008
N2 - We have developed front-end electronics and data acquisition unit for a silicon drift diode (SDD) based prototype detector. The prototype detector consists of an array of 67 SDDs. The array is bump-bonded on a mother board which is cooled by Peltier-water based cooling system. In this study, we describe the function of front-end electronics (including preamplifier, shaper and peak stretcher units) and a data acquisition (DAQ) unit. The hardware consists of three major blocks: 1) a preamplifier board that amplifies the SDD signal, 2) a shaping and stretcher board that shapes event signal and stretches it, and 3) DAQ board that converts analog signal to digital and acquires digitized data. The preamp board amplifies 67 channel SDD signals with OP-amps and controls the jFET of each SDD to optimize reset interval and gain. The shaping board consists of 5 sub-blocks that are shaper, peak stretcher, MUX, discriminator and SHP-ctrl. It shapes the preamplifier signal and generates event signals. The DAQ consists of an array of AID converters and FPGAs. In our FPGA simulation, the system uses 62% of memory, 21% of LOGIC slice. We evaluated and verified 3 boards with including FPGA program. In the result we found and settled some problems which cross talk and noise. However, we meet two problems that are SDD sensor board and synchronous reset circuit. We will fix some problems and evaluate the detector performance such as spatial resolution and energy spectrum, etc. We will also include the results of phantom study later.
AB - We have developed front-end electronics and data acquisition unit for a silicon drift diode (SDD) based prototype detector. The prototype detector consists of an array of 67 SDDs. The array is bump-bonded on a mother board which is cooled by Peltier-water based cooling system. In this study, we describe the function of front-end electronics (including preamplifier, shaper and peak stretcher units) and a data acquisition (DAQ) unit. The hardware consists of three major blocks: 1) a preamplifier board that amplifies the SDD signal, 2) a shaping and stretcher board that shapes event signal and stretches it, and 3) DAQ board that converts analog signal to digital and acquires digitized data. The preamp board amplifies 67 channel SDD signals with OP-amps and controls the jFET of each SDD to optimize reset interval and gain. The shaping board consists of 5 sub-blocks that are shaper, peak stretcher, MUX, discriminator and SHP-ctrl. It shapes the preamplifier signal and generates event signals. The DAQ consists of an array of AID converters and FPGAs. In our FPGA simulation, the system uses 62% of memory, 21% of LOGIC slice. We evaluated and verified 3 boards with including FPGA program. In the result we found and settled some problems which cross talk and noise. However, we meet two problems that are SDD sensor board and synchronous reset circuit. We will fix some problems and evaluate the detector performance such as spatial resolution and energy spectrum, etc. We will also include the results of phantom study later.
UR - http://www.scopus.com/inward/record.url?scp=67649196753&partnerID=8YFLogxK
U2 - 10.1109/NSSMIC.2008.4774178
DO - 10.1109/NSSMIC.2008.4774178
M3 - Conference contribution
AN - SCOPUS:67649196753
SN - 9781424427154
T3 - IEEE Nuclear Science Symposium Conference Record
SP - 4074
EP - 4077
BT - 2008 IEEE Nuclear Science Symposium Conference Record, NSS/MIC 2008
T2 - 2008 IEEE Nuclear Science Symposium Conference Record, NSS/MIC 2008
Y2 - 19 October 2008 through 25 October 2008
ER -