Abstract
In this paper, we introduce a general methodology of reverse engineering for Xilinx FPGA devices using flash memory for programming. Based on the structural analysis of the flash memory used for the most recent 7-Series FPGA, data extraction for reverse engineering is carried out targeting the flash memory with the help of a logic analyzer. The accuracy of the extracted bitstream is finally verified using the in-house reverse engineering tool.
Original language | English |
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Title of host publication | Proceedings - International SoC Design Conference 2022, ISOCC 2022 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 330-331 |
Number of pages | 2 |
ISBN (Electronic) | 9781665459716 |
DOIs | |
Publication status | Published - 2022 |
Event | 19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of Duration: 2022 Oct 19 → 2022 Oct 22 |
Publication series
Name | Proceedings - International SoC Design Conference 2022, ISOCC 2022 |
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Conference
Conference | 19th International System-on-Chip Design Conference, ISOCC 2022 |
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Country/Territory | Korea, Republic of |
City | Gangneung-si |
Period | 22/10/19 → 22/10/22 |
Bibliographical note
Publisher Copyright:© 2022 IEEE.
Keywords
- FPGA
- Reverse Engineering
- bitstream
- flash memory
- logic analyzer
ASJC Scopus subject areas
- Artificial Intelligence
- Computer Science Applications
- Hardware and Architecture
- Safety, Risk, Reliability and Quality