Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards

Dongchan Lee; Sanghyun Lee; Mannhee Cho; Hyung Min Lee; Youngmin Kim

doi:10.1109/ISOCC56007.2022.10031296

Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards

Dongchan Lee, Sanghyun Lee, Mannhee Cho, Hyung Min Lee, Youngmin Kim

School of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, we introduce a general methodology of reverse engineering for Xilinx FPGA devices using flash memory for programming. Based on the structural analysis of the flash memory used for the most recent 7-Series FPGA, data extraction for reverse engineering is carried out targeting the flash memory with the help of a logic analyzer. The accuracy of the extracted bitstream is finally verified using the in-house reverse engineering tool.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2022, ISOCC 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	330-331
Number of pages	2
ISBN (Electronic)	9781665459716
DOIs	https://doi.org/10.1109/ISOCC56007.2022.10031296
Publication status	Published - 2022
Event	19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of Duration: 2022 Oct 19 → 2022 Oct 22

Publication series

Name	Proceedings - International SoC Design Conference 2022, ISOCC 2022

Conference

Conference	19th International System-on-Chip Design Conference, ISOCC 2022
Country/Territory	Korea, Republic of
City	Gangneung-si
Period	22/10/19 → 22/10/22

Keywords

bitstream
flash memory
FPGA
logic analyzer
Reverse Engineering

ASJC Scopus subject areas

Artificial Intelligence
Computer Science Applications
Hardware and Architecture
Safety, Risk, Reliability and Quality

Access to Document

10.1109/ISOCC56007.2022.10031296

Cite this

Lee, D., Lee, S., Cho, M., Lee, H. M., & Kim, Y. (2022). Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards. In Proceedings - International SoC Design Conference 2022, ISOCC 2022 (pp. 330-331). (Proceedings - International SoC Design Conference 2022, ISOCC 2022). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC56007.2022.10031296

Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards. / Lee, Dongchan; Lee, Sanghyun; Cho, Mannhee et al.
Proceedings - International SoC Design Conference 2022, ISOCC 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 330-331 (Proceedings - International SoC Design Conference 2022, ISOCC 2022).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, D, Lee, S, Cho, M, Lee, HM & Kim, Y 2022, Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards. in Proceedings - International SoC Design Conference 2022, ISOCC 2022. Proceedings - International SoC Design Conference 2022, ISOCC 2022, Institute of Electrical and Electronics Engineers Inc., pp. 330-331, 19th International System-on-Chip Design Conference, ISOCC 2022, Gangneung-si, Korea, Republic of, 22/10/19. https://doi.org/10.1109/ISOCC56007.2022.10031296

Lee D, Lee S, Cho M, Lee HM, Kim Y. Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards. In Proceedings - International SoC Design Conference 2022, ISOCC 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 330-331. (Proceedings - International SoC Design Conference 2022, ISOCC 2022). doi: 10.1109/ISOCC56007.2022.10031296

@inproceedings{c5778ad56e004bb9a6dfaa466e0b3454,

title = "Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards",

abstract = "In this paper, we introduce a general methodology of reverse engineering for Xilinx FPGA devices using flash memory for programming. Based on the structural analysis of the flash memory used for the most recent 7-Series FPGA, data extraction for reverse engineering is carried out targeting the flash memory with the help of a logic analyzer. The accuracy of the extracted bitstream is finally verified using the in-house reverse engineering tool.",

keywords = "bitstream, flash memory, FPGA, logic analyzer, Reverse Engineering",

author = "Dongchan Lee and Sanghyun Lee and Mannhee Cho and Lee, {Hyung Min} and Youngmin Kim",

note = "Funding Information: ACKNOWLEDGMENT This work was supported as part of Military Crypto Research Center (UD210027XD) funded by Defense Acquisition Program Administration (DAPA) and Agency for Defense Development (ADD). Publisher Copyright: {\textcopyright} 2022 IEEE.; 19th International System-on-Chip Design Conference, ISOCC 2022 ; Conference date: 19-10-2022 Through 22-10-2022",

year = "2022",

doi = "10.1109/ISOCC56007.2022.10031296",

language = "English",

series = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "330--331",

booktitle = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",

}

TY - GEN

T1 - Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards

AU - Lee, Dongchan

AU - Lee, Sanghyun

AU - Cho, Mannhee

AU - Lee, Hyung Min

AU - Kim, Youngmin

N1 - Funding Information: ACKNOWLEDGMENT This work was supported as part of Military Crypto Research Center (UD210027XD) funded by Defense Acquisition Program Administration (DAPA) and Agency for Defense Development (ADD). Publisher Copyright: © 2022 IEEE.

PY - 2022

Y1 - 2022

N2 - In this paper, we introduce a general methodology of reverse engineering for Xilinx FPGA devices using flash memory for programming. Based on the structural analysis of the flash memory used for the most recent 7-Series FPGA, data extraction for reverse engineering is carried out targeting the flash memory with the help of a logic analyzer. The accuracy of the extracted bitstream is finally verified using the in-house reverse engineering tool.

AB - In this paper, we introduce a general methodology of reverse engineering for Xilinx FPGA devices using flash memory for programming. Based on the structural analysis of the flash memory used for the most recent 7-Series FPGA, data extraction for reverse engineering is carried out targeting the flash memory with the help of a logic analyzer. The accuracy of the extracted bitstream is finally verified using the in-house reverse engineering tool.

KW - bitstream

KW - flash memory

KW - FPGA

KW - logic analyzer

KW - Reverse Engineering

UR - http://www.scopus.com/inward/record.url?scp=85148444108&partnerID=8YFLogxK

U2 - 10.1109/ISOCC56007.2022.10031296

DO - 10.1109/ISOCC56007.2022.10031296

M3 - Conference contribution

AN - SCOPUS:85148444108

T3 - Proceedings - International SoC Design Conference 2022, ISOCC 2022

SP - 330

EP - 331

BT - Proceedings - International SoC Design Conference 2022, ISOCC 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 19th International System-on-Chip Design Conference, ISOCC 2022

Y2 - 19 October 2022 through 22 October 2022

ER -

Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

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