Design and implementation of an on-chip permutation network for multiprocessor system-on-chip

Phi Hung Pham, Junyoung Song, Jongsun Park, Chulwoo Kim

Research output: Contribution to journalArticlepeer-review

11 Citations (Scopus)


This paper presents the silicon-proven design of a novel on-chip network to support guaranteed traffic permutation in multiprocessor system-on-chip applications. The proposed network employs a pipelined circuit-switching approach combined with a dynamic path-setup scheme under a multistage network topology. The dynamic path-setup scheme enables runtime path arrangement for arbitrary traffic permutations. The circuit-switching approach offers a guarantee of permuted data and its compact overhead enables the benefit of stacking multiple networks. A 0.13-μm CMOS test-chip validates the feasibility and efficiency of the proposed design. Experimental results show that the proposed on-chip network achieves 1.9× to 8.2× reduction of silicon overhead compared to other design approaches.

Original languageEnglish
Article number6133316
Pages (from-to)173-177
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number1
Publication statusPublished - 2013


  • Guaranteed throughput
  • multistage interconnection network
  • network-on-chip
  • permutation network
  • pipelined circuit-switching
  • traffic permutation

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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