Design of a 169% locking-range frequency divider with programmable input sensitivity

Byeonghak Jo; Hyeonseok Hwang; Junil Moon; Seung Baek Park; Soo Won Kim

doi:10.1109/ICCE.2015.7066389

Design of a 169% locking-range frequency divider with programmable input sensitivity

Byeonghak Jo
, Hyeonseok Hwang
, Junil Moon
, Seung Baek Park
, Soo Won Kim

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A wide locking-range frequency divider with programmable input sensitivity is presented in this paper. The frequency divider consists of two D flip-flop-based current mode logic latches and a current control circuit. The current control circuit adjusts the current ratio of the sampling pair and the latching pair, while the total current is maintained as a constant. The current control circuit enables the self-oscillation frequency to be adapted to the input frequency. As a result, the divider has wide locking range below -10 dBm input level. The proposed frequency divider is implemented in 0.18 um standard CMOS technology, and the measurement results show a 169% frequency locking range of between 0.5 and 6 GHz at an input power of - 10 dBm while consuming 7.2 mW from a 1.8 V supply voltage.

Original language	English
Title of host publication	2015 IEEE International Conference on Consumer Electronics, ICCE 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	222-223
Number of pages	2
ISBN (Electronic)	9781479975426
DOIs	https://doi.org/10.1109/ICCE.2015.7066389
Publication status	Published - 2015 Mar 23
Event	2015 IEEE International Conference on Consumer Electronics, ICCE 2015 - Las Vegas, United States Duration: 2015 Jan 9 → 2015 Jan 12

Publication series

Name	2015 IEEE International Conference on Consumer Electronics, ICCE 2015

Other

Other	2015 IEEE International Conference on Consumer Electronics, ICCE 2015
Country/Territory	United States
City	Las Vegas
Period	15/1/9 → 15/1/12

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

current mode logic latch
divide-by-2
frequency divider
wide locking range

ASJC Scopus subject areas

Computer Networks and Communications
Electrical and Electronic Engineering
Industrial and Manufacturing Engineering

Access to Document

10.1109/ICCE.2015.7066389

Cite this

Jo, B., Hwang, H., Moon, J., Park, S. B., & Kim, S. W. (2015). Design of a 169% locking-range frequency divider with programmable input sensitivity. In 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 (pp. 222-223). Article 7066389 (2015 IEEE International Conference on Consumer Electronics, ICCE 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE.2015.7066389

Design of a 169% locking-range frequency divider with programmable input sensitivity. / Jo, Byeonghak; Hwang, Hyeonseok; Moon, Junil et al.
2015 IEEE International Conference on Consumer Electronics, ICCE 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 222-223 7066389 (2015 IEEE International Conference on Consumer Electronics, ICCE 2015).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Jo, B, Hwang, H, Moon, J, Park, SB & Kim, SW 2015, Design of a 169% locking-range frequency divider with programmable input sensitivity. in 2015 IEEE International Conference on Consumer Electronics, ICCE 2015., 7066389, 2015 IEEE International Conference on Consumer Electronics, ICCE 2015, Institute of Electrical and Electronics Engineers Inc., pp. 222-223, 2015 IEEE International Conference on Consumer Electronics, ICCE 2015, Las Vegas, United States, 15/1/9. https://doi.org/10.1109/ICCE.2015.7066389

Jo B, Hwang H, Moon J, Park SB, Kim SW. Design of a 169% locking-range frequency divider with programmable input sensitivity. In 2015 IEEE International Conference on Consumer Electronics, ICCE 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 222-223. 7066389. (2015 IEEE International Conference on Consumer Electronics, ICCE 2015). doi: 10.1109/ICCE.2015.7066389

@inproceedings{7104ba0a45504c5499499a13aae65d29,

title = "Design of a 169\% locking-range frequency divider with programmable input sensitivity",

abstract = "A wide locking-range frequency divider with programmable input sensitivity is presented in this paper. The frequency divider consists of two D flip-flop-based current mode logic latches and a current control circuit. The current control circuit adjusts the current ratio of the sampling pair and the latching pair, while the total current is maintained as a constant. The current control circuit enables the self-oscillation frequency to be adapted to the input frequency. As a result, the divider has wide locking range below -10 dBm input level. The proposed frequency divider is implemented in 0.18 um standard CMOS technology, and the measurement results show a 169\% frequency locking range of between 0.5 and 6 GHz at an input power of - 10 dBm while consuming 7.2 mW from a 1.8 V supply voltage.",

keywords = "current mode logic latch, divide-by-2, frequency divider, wide locking range",

author = "Byeonghak Jo and Hyeonseok Hwang and Junil Moon and Park, \{Seung Baek\} and Kim, \{Soo Won\}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 ; Conference date: 09-01-2015 Through 12-01-2015",

year = "2015",

month = mar,

day = "23",

doi = "10.1109/ICCE.2015.7066389",

language = "English",

series = "2015 IEEE International Conference on Consumer Electronics, ICCE 2015",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "222--223",

booktitle = "2015 IEEE International Conference on Consumer Electronics, ICCE 2015",

}

TY - GEN

T1 - Design of a 169% locking-range frequency divider with programmable input sensitivity

AU - Jo, Byeonghak

AU - Hwang, Hyeonseok

AU - Moon, Junil

AU - Park, Seung Baek

AU - Kim, Soo Won

PY - 2015/3/23

Y1 - 2015/3/23

N2 - A wide locking-range frequency divider with programmable input sensitivity is presented in this paper. The frequency divider consists of two D flip-flop-based current mode logic latches and a current control circuit. The current control circuit adjusts the current ratio of the sampling pair and the latching pair, while the total current is maintained as a constant. The current control circuit enables the self-oscillation frequency to be adapted to the input frequency. As a result, the divider has wide locking range below -10 dBm input level. The proposed frequency divider is implemented in 0.18 um standard CMOS technology, and the measurement results show a 169% frequency locking range of between 0.5 and 6 GHz at an input power of - 10 dBm while consuming 7.2 mW from a 1.8 V supply voltage.

AB - A wide locking-range frequency divider with programmable input sensitivity is presented in this paper. The frequency divider consists of two D flip-flop-based current mode logic latches and a current control circuit. The current control circuit adjusts the current ratio of the sampling pair and the latching pair, while the total current is maintained as a constant. The current control circuit enables the self-oscillation frequency to be adapted to the input frequency. As a result, the divider has wide locking range below -10 dBm input level. The proposed frequency divider is implemented in 0.18 um standard CMOS technology, and the measurement results show a 169% frequency locking range of between 0.5 and 6 GHz at an input power of - 10 dBm while consuming 7.2 mW from a 1.8 V supply voltage.

KW - current mode logic latch

KW - divide-by-2

KW - frequency divider

KW - wide locking range

UR - https://www.scopus.com/pages/publications/84936112554

U2 - 10.1109/ICCE.2015.7066389

DO - 10.1109/ICCE.2015.7066389

M3 - Conference contribution

AN - SCOPUS:84936112554

T3 - 2015 IEEE International Conference on Consumer Electronics, ICCE 2015

SP - 222

EP - 223

BT - 2015 IEEE International Conference on Consumer Electronics, ICCE 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2015 IEEE International Conference on Consumer Electronics, ICCE 2015

Y2 - 9 January 2015 through 12 January 2015

ER -

Design of a 169% locking-range frequency divider with programmable input sensitivity

Abstract

Publication series

Other

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this