TY - GEN
T1 - Design of time delay controller based on variable reference model
AU - Song, Jae Bok
AU - Byeon, Kyeong Seok
PY - 1998
Y1 - 1998
N2 - Many plants have upper and lower bounds beyond which saturation of control efforts occurs. Since the saturation adversely affects control performance, it should be avoided if possible. In this paper a new approach of avoiding saturation by varying the reference model for TDC(time delay control-based systems subject to the step changes in reference inputs. In this scheme, the variable reference model is determined based on the information on control inputs and the size of the step changes in the reference inputs. This scheme is verified by application to the position control experiments using a brushless DC servo system.
AB - Many plants have upper and lower bounds beyond which saturation of control efforts occurs. Since the saturation adversely affects control performance, it should be avoided if possible. In this paper a new approach of avoiding saturation by varying the reference model for TDC(time delay control-based systems subject to the step changes in reference inputs. In this scheme, the variable reference model is determined based on the information on control inputs and the size of the step changes in the reference inputs. This scheme is verified by application to the position control experiments using a brushless DC servo system.
UR - http://www.scopus.com/inward/record.url?scp=33646544935&partnerID=8YFLogxK
U2 - 10.1109/ACC.1998.703193
DO - 10.1109/ACC.1998.703193
M3 - Conference contribution
AN - SCOPUS:33646544935
SN - 0780345304
SN - 9780780345300
T3 - Proceedings of the American Control Conference
SP - 3339
EP - 3343
BT - Proceedings of the 1998 American Control Conference, ACC 1998
T2 - 1998 American Control Conference, ACC 1998
Y2 - 24 June 1998 through 26 June 1998
ER -