Design of time delay controller using variable reference model

Reference models are used in many control algorithms to improve transient response characteristics. Most control systems have bounded control inputs to avoid saturation of the plant. If the reference models do not account for the limits of the control inputs, the control performance of the system may deteriorate. In this paper a new approach to avoid saturation is proposed by varying the reference model for time delay control-based systems subject to step changes in the reference input. In this scheme, the variable reference model is determined based on the information on control inputs and the size of the step changes in the reference inputs. This scheme was verified by application to the BLDC motor position control system in simulations and experiments.