Detecting trapdoors in smart cards using timing and power analysis

Jung Youp Lee; Seok Won Jung; Jongin Lim

doi:10.1007/11430230_19

Detecting trapdoors in smart cards using timing and power analysis

Jung Youp Lee, Seok Won Jung, Jongin Lim

Research output: Contribution to journal › Conference article › peer-review

3 Citations (Scopus)

Abstract

For economic reasons, in spite of security problems, the commands of re-initializing the card and writing patch code are widely used in smart cards. The current software tester has difficulty in detecting these trapdoor commands by reason that trapdoors are not published and programmed sophisticatedly. Up to now the effective way to detect them is to completely reveal and analyze the entire code of the COS with applications such as the ITSEC. It is, however, very time-consuming and expensive processes. We propose a new approach of detecting trapdoors in smart cards using timing and power analysis. By experiments, this paper shows that this approach is a more practical method than the current methods.

Original language	English
Pages (from-to)	275-288
Number of pages	14
Journal	Lecture Notes in Computer Science
Volume	3502
DOIs	https://doi.org/10.1007/11430230_19
Publication status	Published - 2005
Event	17th IFIP TC6/WG 6.1 International Conference, TestCom 2005: Testing of Communicating Systems - Montreal, Que., Canada Duration: 2005 May 31 → 2005 Jun 2

Keywords

Power Analysis
Smart Card
Timing Analysis
Trapdoor

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

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10.1007/11430230_19

Cite this

@article{99c5b09805ae46d0a8bc6e865972cec4,

title = "Detecting trapdoors in smart cards using timing and power analysis",

abstract = "For economic reasons, in spite of security problems, the commands of re-initializing the card and writing patch code are widely used in smart cards. The current software tester has difficulty in detecting these trapdoor commands by reason that trapdoors are not published and programmed sophisticatedly. Up to now the effective way to detect them is to completely reveal and analyze the entire code of the COS with applications such as the ITSEC. It is, however, very time-consuming and expensive processes. We propose a new approach of detecting trapdoors in smart cards using timing and power analysis. By experiments, this paper shows that this approach is a more practical method than the current methods.",

keywords = "Power Analysis, Smart Card, Timing Analysis, Trapdoor",

author = "Lee, {Jung Youp} and Jung, {Seok Won} and Jongin Lim",

note = "Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 17th IFIP TC6/WG 6.1 International Conference, TestCom 2005: Testing of Communicating Systems ; Conference date: 31-05-2005 Through 02-06-2005",

year = "2005",

doi = "10.1007/11430230_19",

language = "English",

volume = "3502",

pages = "275--288",

journal = "Lecture Notes in Computer Science",

issn = "0302-9743",

publisher = "Springer Science and Business Media Deutschland GmbH",

}

TY - JOUR

T1 - Detecting trapdoors in smart cards using timing and power analysis

AU - Lee, Jung Youp

AU - Jung, Seok Won

AU - Lim, Jongin

PY - 2005

Y1 - 2005

N2 - For economic reasons, in spite of security problems, the commands of re-initializing the card and writing patch code are widely used in smart cards. The current software tester has difficulty in detecting these trapdoor commands by reason that trapdoors are not published and programmed sophisticatedly. Up to now the effective way to detect them is to completely reveal and analyze the entire code of the COS with applications such as the ITSEC. It is, however, very time-consuming and expensive processes. We propose a new approach of detecting trapdoors in smart cards using timing and power analysis. By experiments, this paper shows that this approach is a more practical method than the current methods.

AB - For economic reasons, in spite of security problems, the commands of re-initializing the card and writing patch code are widely used in smart cards. The current software tester has difficulty in detecting these trapdoor commands by reason that trapdoors are not published and programmed sophisticatedly. Up to now the effective way to detect them is to completely reveal and analyze the entire code of the COS with applications such as the ITSEC. It is, however, very time-consuming and expensive processes. We propose a new approach of detecting trapdoors in smart cards using timing and power analysis. By experiments, this paper shows that this approach is a more practical method than the current methods.

KW - Power Analysis

KW - Smart Card

KW - Timing Analysis

KW - Trapdoor

UR - http://www.scopus.com/inward/record.url?scp=24944573502&partnerID=8YFLogxK

U2 - 10.1007/11430230_19

DO - 10.1007/11430230_19

M3 - Conference article

AN - SCOPUS:24944573502

SN - 0302-9743

VL - 3502

SP - 275

EP - 288

JO - Lecture Notes in Computer Science

JF - Lecture Notes in Computer Science

T2 - 17th IFIP TC6/WG 6.1 International Conference, TestCom 2005: Testing of Communicating Systems

Y2 - 31 May 2005 through 2 June 2005

ER -

Detecting trapdoors in smart cards using timing and power analysis

Abstract

Keywords

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