Abstract
For economic reasons, in spite of security problems, the commands of re-initializing the card and writing patch code are widely used in smart cards. The current software tester has difficulty in detecting these trapdoor commands by reason that trapdoors are not published and programmed sophisticatedly. Up to now the effective way to detect them is to completely reveal and analyze the entire code of the COS with applications such as the ITSEC. It is, however, very time-consuming and expensive processes. We propose a new approach of detecting trapdoors in smart cards using timing and power analysis. By experiments, this paper shows that this approach is a more practical method than the current methods.
Original language | English |
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Pages (from-to) | 275-288 |
Number of pages | 14 |
Journal | Lecture Notes in Computer Science |
Volume | 3502 |
DOIs | |
Publication status | Published - 2005 |
Event | 17th IFIP TC6/WG 6.1 International Conference, TestCom 2005: Testing of Communicating Systems - Montreal, Que., Canada Duration: 2005 May 31 → 2005 Jun 2 |
Keywords
- Power Analysis
- Smart Card
- Timing Analysis
- Trapdoor
ASJC Scopus subject areas
- Theoretical Computer Science
- Computer Science(all)